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CY74FCT2543T Datasheet Preview

CY74FCT2543T Datasheet

8-BIT LATCHED TRANSCEIVER

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D Function and Pinout Compatible With FCT
and F Logic
D 25-W Output Series Resistors to Reduce
Transmission-Line Reflection Noise
D Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
D Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D Ioff Supports Partial-Power-Down Mode
Operation
D Matched Rise and Fall Times
D Fully Compatible With TTL Input and
Output Logic Levels
D 12-mA Output Sink Current
15-mA Output Source Current
D Separation Controls for Data Flow in Each
Direction
D Back-to-Back Latches for Storage
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D 3-State Outputs
CY74FCT2543T
8-BIT LATCHED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS042C – SEPTEMBER 1994 – REVISED NOVEMBER 2001
Q OR SO PACKAGE
(TOP VIEW)
LEBA
OEBA
A0
A1
A2
A3
A4
A5
A6
A7
CEAB
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 VCC
23 CEBA
22 B0
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
14 LEAB
13 OEAB
description
The CY74FCT2543T octal latched transceiver contains two sets of eight D-type latches. Separate latch enable
(LEAB, LEBA) and output enable (OEAB, OEBA) inputs permit each latch set to have independent control of
inputting and outputting in either direction of data flow. For example, for data flow from A to B, the A-to-B enable
(CEAB) input must be low to enter data from A or to take data from B, as indicated in the function table. With
CEAB low, a low signal on the A-to-B latch enable (LEAB) input makes the A-to-B latches transparent; a
subsequent low-to-high transition of LEAB puts the A latches in the storage mode and their outputs no longer
change with the A inputs. With CEAB and OEAB both low, the 3-state B output buffers are active and reflect
data present at the output of the A latches. Control of data from B to A is similar, but uses CEAB, LEAB, and
OEAB inputs. On-chip termination resistors at the outputs reduce system noise caused by reflections. The
CY74FCT2543T can replace the CY74FCT543T to reduce noise in an existing design.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2001, Texas Instruments Incorporated
1




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CY74FCT2543T Datasheet Preview

CY74FCT2543T Datasheet

8-BIT LATCHED TRANSCEIVER

No Preview Available !

CY74FCT2543T
8-BIT LATCHED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS042C SEPTEMBER 1994 REVISED NOVEMBER 2001
NAME
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A
B
PIN DESCRIPTION
DESCRIPTION
A-to-B output-enable input (active low)
B-to-A output-enable input (active low)
A-to-B enable input (active low)
B-to-A enable input (active low)
A-to-B latch-enable input (active low)
B-to-A latch-enable input (active low)
A-to-B data inputs or B-to-A 3-state outputs
B-to-A data inputs or A-to-B 3-state outputs
ORDERING INFORMATION
TA
PACKAGE
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP Q Tape and reel 5.3 CY74FCT2543CTQCT
FCT2543C
Tube
5.3 CY74FCT2543CTSOC
SOIC SO
FCT2543C
Tape and reel 5.3 CY74FCT2543CTSOCT
40°C to 85°C QSOP Q Tape and reel 6.5 CY74FCT2543ATQCT
FCT2543A
Tube
SOIC SO
Tape and reel
6.5 CY74FCT2543ATSOC
6.5 CY74FCT2543ATSOCT
FCT2543A
QSOP Q Tape and reel 8.5 CY74FCT2543TQCT
FCT2543
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
CEAB LEAB OEAB
LATCH
A-TO-B
OUTPUT
B
H X X Storing
Z
X H X Storing
X
XXH
X
Z
L L L Transparent Current A inputs
L
H
L
Storing
Previous A inputs
Before LEAB low-to-high transition
H = High logic level, L = Low logic level, X = Dont care,
Z = High-impedance state
A-to-B data flow shown; B-to-A is the same, except using CEBA, LEBA,
and OEBA.
2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number CY74FCT2543T
Description 8-BIT LATCHED TRANSCEIVER
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