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DP83867IR Datasheet Preview

DP83867IR Datasheet

High Immunity 10/100/1000 Ethernet Physical Layer Transceiver

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DP83867IR, DP83867CR
SNLS484E – FEBRUARY 2015 – REVISED MARCH 2017
DP83867IR/CR Robust, High Immunity 10/100/1000 Ethernet Physical Layer Transceiver
1 Features
1 Ultra Low RGMII Latency TX < 90ns, RX < 290ns
• Low Power consumption 457 mW
• Exceeds 8000 V IEC 61000-4-2 ESD Protection
• Meets EN55011 Class B Emission Standards
• 16 Programmable RGMII Delay Modes on RX/TX
• Integrated MDI Termination Resistors
• Programmable MII/GMII/RGMII Termination
Impedance
• WoL (Wake-on-LAN) Packet Detection
• 25-MHz or 125-MHz Synchronized Clock Output
• IEEE 1588 Time Stamp Support
• RJ45 Mirror Mode
• Fully Compatible to IEEE 802.3 10BASE-Te,
100BASE-TX, and 1000BASE-T Specification
• Cable Diagnostics
• MII, GMII and RGMII MAC Interface Options
• Configurable I/O Voltage (3.3 V, 2.5 V, 1.8 V)
• Fast Link up / Link Drop Modes
• JTAG Support
2 Applications
• Motor and Motion Control
• Industrial Factory Automation
• Industrial Embedded Computing
• Wired and Wireless Communications
Infrastructure
• Test and Measurement
• Consumer Electronics
3 Description
The DP83867 device is a robust, low power, fully
featured Physical Layer transceiver with integrated
PMD sublayers to support 10BASE-Te, 100BASE-TX
and 1000BASE-T Ethernet protocols. Optimized for
ESD protection, the DP83867 exceeds 8-kV IEC
61000-4-2 (direct contact).
The DP83867 is designed for easy implementation of
10/100/1000 Mbps Ethernet LANs. It interfaces
directly to twisted pair media via an external
transformer. This device interfaces directly to the
MAC layer through the IEEE 802.3 Standard Media
Independent Interface (MII), the IEEE 802.3 Gigabit
Media Independent Interface (GMII) or Reduced GMII
(RGMII). The QFP package supports MII/GMII/RGMII
whereas the QFN package supports RGMII.
The DP83867 provides precision clock
synchronization, including a synchronous Ethernet
clock output. It has low latency and provides IEEE
1588 Start of Frame Detection.
The DP83867 consumes only 490mW (PAP) and
457mW (RGZ) under full operating power. Wake on
LAN can be used to lower system power
consumption.
PART NUMBER
DP83867IRPAP
DP83867IRRGZ
DP83867CRRGZ
Device Information(1)
TEMPERATURE PACKAGE BODY SIZE (NOM)
–40°C to +85°C QFP (64) 10 mm x 10 mm
–40°C to +85°C QFN (48) 7 mm x 7 mm
0°C to +70°C
QFN (48) 7 mm x 7 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
MII (PAP)
GMII (PAP)
RGMII (PAP, RGZ)
System Diagram
10BASE-Te
100BASE-TX
1000BASE-T
Ethernet MAC
DP83867
10/100/1000 Mbps
Ethernet Physical Layer
Magnetics
RJ-45
25 MHz
Crystal or Oscillator
Status
LEDs
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

DP83867IR Datasheet Preview

DP83867IR Datasheet

High Immunity 10/100/1000 Ethernet Physical Layer Transceiver

No Preview Available !

DP83867IR, DP83867CR
SNLS484E – FEBRUARY 2015 – REVISED MARCH 2017
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 3
5 Device Comparison ............................................... 7
6 Pin Configuration and Functions ......................... 7
6.1 Unused Pins........................................................... 12
7 Specifications....................................................... 13
7.1 Absolute Maximum Ratings .................................... 13
7.2 ESD Ratings............................................................ 13
7.3 Recommended Operating Conditions..................... 13
7.4 Thermal Information ................................................ 14
7.5 Electrical Characteristics......................................... 14
7.6 Power-Up Timing .................................................... 15
7.7 Reset Timing ........................................................... 16
7.8 MII Serial Management Timing ............................... 16
7.9 RGMII Timing .......................................................... 16
7.10 GMII Transmit Timing ........................................... 17
7.11 GMII Receive Timing ............................................ 17
7.12 100-Mbps MII Transmit Timing ............................. 17
7.13 100-Mbps MII Receive Timing .............................. 17
7.14 10-Mbps MII Transmit Timing ............................... 18
7.15 10-Mbps MII Receive Timing ................................ 18
7.16 DP83867IR/CR Start of Frame Detection Timing . 18
7.17 Typical Characteristics .......................................... 23
8 Detailed Description ............................................ 24
8.1 Overview ................................................................. 24
8.2 Functional Block Diagram ....................................... 25
8.3 Feature Description................................................. 27
8.4 Device Functional Modes........................................ 30
8.5 Programming .......................................................... 45
8.6 Register Maps ......................................................... 54
9 Application and Implementation ...................... 109
9.1 Application Information.......................................... 109
9.2 Typical Application ............................................... 109
10 Power Supply Recommendations ................... 113
11 Layout................................................................. 115
11.1 Layout Guidelines ............................................... 115
11.2 Layout Example .................................................. 118
12 Device and Documentation Support ............... 119
12.1 Documentation Support ...................................... 119
12.2 Related Links ...................................................... 119
12.3 Receiving Notification of Documentation
Updates.................................................................. 119
12.4 Community Resources........................................ 119
12.5 Trademarks ......................................................... 119
12.6 Electrostatic Discharge Caution .......................... 119
12.7 Glossary .............................................................. 119
13 Mechanical, Packaging, and Orderable
Information ......................................................... 120
2 Submit Documentation Feedback
Copyright © 2015–2017, Texas Instruments Incorporated
Product Folder Links: DP83867IR DP83867CR


Part Number DP83867IR
Description High Immunity 10/100/1000 Ethernet Physical Layer Transceiver
Maker etcTI
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