SNOSAS7A – MARCH 2006 – REVISED APRIL 2013
DS26LV32AQML 3V Enhanced CMOS Quad Differential Line Receiver
Check for Samples: DS26LV32AQML
•2 Comparable to Both TIA/EIA-422 and ITU-T
• Low Power CMOS Design (30 mW typical)
• Interoperable with Existing 5V RS-422
• Receiver OPEN Input Failsafe Feature
• Pin Compatible with DS26C32AT
The DS26LV32A is a high speed quad differential
CMOS receiver that is comparable to TIA/EIA-422-B
and ITU-T V.11 standards, but with a specified
common mode voltage range of -0.5V to +5.5V due
to the lower operating supply voltage of 3.0V to 3.6V.
The TRI-STATE enables, EN and EN, allow the
device to be active High or active Low. The enables
are common to all four receivers. The receiver output
(RO) is specified to be High when the inputs are left
open. The receiver can detect signals as low as
±200mV over the common mode range of -0.5V to
+5.5V. The receiver outputs (RO) are compatible with
TTL and LVCMOS levels.
Figure 1. CLGA Package- Top View
See Package Number NAD0016A
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