Datasheet Summary
DS90CR483A, DS90CR484A
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SNLS291A
- APRIL 2008
- REVISED APRIL 2013
DS90CR483A / DS90CR484A 48-Bit LVDS Channel Link SER/DES
- 33
- 112 MHz
Check for Samples: DS90CR483A, DS90CR484A
Features
- 2 Up to 5.38 Gbits/sec Bandwidth
- 33 MHz to 112 MHz Input Clock Support
- LVDS SER/DES Reduces Cable and Connector Size
- Pre-emphasis Reduces Cable Loading Effects
- DC Balance Data Transmission Provided by Transmitter Reduces ISI Distortion
- Cable Deskew of +/- 1 LVDS Data Bit Time (up to 80 MHz Clock Rate)
- 5V Tolerant TxIN and Control Input Pins
- Flow Through Pinout for Easy PCB Design
- +3.3V Supply Voltage
- Transmitter Rejects Cycle-to-Cycle Jitter
- Conforms to ANSI/TIA/EIA-644...
