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DS90CR486 - 133MHz 48-Bit Channel Link Deserializer

Description

The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of LVCMOS/LVTTL data.

Using a 133MHz clock, the data throughput is 6.384Gbit/s (798Mbytes/s).

The multiplexing of data lines provides a substantial cable reduction.

Features

  • 1.
  • 2 Up to 6.384 Gbps Throughput.
  • 66MHz to 133MHz Input Clock Support.
  • Reduces Cable and Connector Size and Cost.
  • Cable Deskew Function.
  • DC Balance Reduces ISI Distortion.
  • For Point-to-Point Backplane or Cable.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90CR486 www.ti.com SNLS149C – FEBRUARY 2003 – REVISED MARCH 2013 DS90CR486 133MHz 48-Bit Channel Link Deserializer (6.384 Gbps) Check for Samples: DS90CR486 FEATURES 1 •2 Up to 6.384 Gbps Throughput • 66MHz to 133MHz Input Clock Support • Reduces Cable and Connector Size and Cost • Cable Deskew Function • DC Balance Reduces ISI Distortion • For Point-to-Point Backplane or Cable Applications • Low Power, 890 mW Typ at 133MHz • Flow through Pinout for Easy PCB Design • +3.3V Supply Voltage • 100-pin TQFP Package • Conforms to TIA/EIA-644-A-2001 LVDS Standard DESCRIPTION The DS90CR486 receiver converts eight Low Voltage Differential Signaling (LVDS) data streams back into 48 bits of LVCMOS/LVTTL data. Using a 133MHz clock, the data throughput is 6.384Gbit/s (798Mbytes/s).
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