DS92LV010A
Description
The DS92LV010A is one in a series of transceivers designed specifically for the high speed, low power proprietary bus backplane interfaces.
Key Features
- 2 Bus LVDS Signaling (BLVDS)
- Designed for Double Termination Applications
- Balanced Output Impedance
- Lite Bus Loading 5pF Typical
- Glitch Free Power Up/Down (Driver Disabled)
- 3.3V or 5.0V Operation
- ±100mV Receiver Sensitivity
- High Signaling Rate Capability (Above 100
- Low Power CMOS Design
- Product Offered in 8 Lead SOIC Package