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DS92LV1260 - Six Channel 10 Bit BLVDS Deserializer

Description

The DS92LV1260 integrates six deserializer devices into a single chip.

The chip uses a 0.25u CMOS process technology.

The DS92LV1260 can simultaneously deserialize up to six data streams that have been serialized by the Texas Instruments DS92LV1021 or DS92LV1023 Bus LVDS serializers.

Features

  • 1.
  • 2 Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks.
  • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams.
  • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input.
  • Parallel Clock Rate up to 40MHz.
  • On Chip Filtering for PLL.
  • Absolute Maximum Worst Case Power Dissipation = 1.9W at 3.6V.
  • High Impedance Inputs Upon Power Off (Vcc = 0V).

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Other Datasheets by Texas Instruments

Full PDF Text Transcription

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DS92LV1260 www.ti.com SNLS134F – DECEMBER 2000 – REVISED APRIL 2013 DS92LV1260 Six Channel 10 Bit BLVDS Deserializer Check for Samples: DS92LV1260 FEATURES 1 •2 Deserializes One to Six BusLVDS Input Serial Data Streams with Embedded Clocks • Seven Selectable Serial Inputs to Support n+1 Redundancy of Deserialized Streams • Seventh Channel has Single Pin Monitor Output That Reflects Input From Seventh Channel Input • Parallel Clock Rate up to 40MHz • On Chip Filtering for PLL • Absolute Maximum Worst Case Power Dissipation = 1.9W at 3.6V • High Impedance Inputs Upon Power Off (Vcc = 0V) • Single Power Supply at +3.
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