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LM2737 Datasheet Preview

LM2737 Datasheet

N-Channel FET Synchronous Buck Regulator Controller

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LM2727, LM2737
www.ti.com
SNVS205D – AUGUST 2002 – REVISED MARCH 2013
LM2727/LM2737 N-Channel FET Synchronous Buck Regulator Controller for Low Output
Voltages
Check for Samples: LM2727, LM2737
FEATURES
1
2 Input Power from 2.2V to 16V
• Output Voltage Adjustable Down to 0.6V
• Power Good flag, Adjustable Soft-Start and
Output Enable for Easy Power Sequencing
• Output Over-Voltage and Under-Voltage Latch-
Off (LM2727)
• Output Over-Voltage and Under-Voltage Flag
(LM2737)
• Reference Accuracy: 1.5% (0°C - 125°C)
• Current Limit Without Sense Resistor
• Soft Start
• Switching Frequency from 50 kHz to 2 MHz
• TSSOP-14 Package
APPLICATIONS
• Cable Modems
• Set-Top Boxes/ Home Gateways
• DDR Core Power
• High-Efficiency Distributed Power
• Local Regulation of Core Power
DESCRIPTION
The LM2727 and LM2737 are high-speed,
synchronous, switching regulator controllers. They
are intended to control currents of 0.7A to 20A with
up to 95% conversion efficiencies. The LM2727
employs output over-voltage and under-voltage latch-
off. For applications where latch-off is not desired, the
LM2737 can be used. Power up and down
sequencing is achieved with the power-good flag,
adjustable soft-start and output enable features. The
LM2737 and LM2737 operate from a low-current 5V
bias and can convert from a 2.2V to 16V power rail.
Both parts utilize a fixed-frequency, voltage-mode,
PWM control architecture and the switching
frequency is adjustable from 50kHz to 2MHz by
adjusting the value of an external resistor. Current
limit is achieved by monitoring the voltage drop
across the on-resistance of the low-side MOSFET,
which enhances low duty-cycle operation. The wide
range of operating frequencies gives the power
supply designer the flexibility to fine-tune component
size, cost, noise and efficiency. The adaptive, non-
overlapping MOSFET gate-drivers and high-side
bootstrap structure helps to further maximize
efficiency. The high-side power FET drain voltage can
be from 2.2V to 16V and the output voltage is
adjustable down to 0.6V.
Typical Application
+5V
D1
RIN
10:
CIN
2.2PF
RFADJ
63.4k
CSS
12n
VCC
SD
PWGD
FREQ
SS
SGND
EAO
HG
LM27x7
BOOT
ISEN
LG
PGND
PGND
FB
CC2
180p
CC1
2.2p
RC1
392k
CBOOT
VIN = 3.3V
0.1P
RCS
2.2k
Q1 Si4884DY
1.5 PH
6.1 A, 9.6 m:
L1
Q2 Si4884DY
RFB2
10k
CIN1,2
10PF
6.3V
VO = 1.2V@5A
+
CO1,2
2200PF
6.3V, 2.8A
RFB1
10k
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2013, Texas Instruments Incorporated




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LM2737 Datasheet Preview

LM2737 Datasheet

N-Channel FET Synchronous Buck Regulator Controller

No Preview Available !

LM2727, LM2737
SNVS205D – AUGUST 2002 – REVISED MARCH 2013
Connection Diagram
1
BOOT
2
LG
3
PGND
4 SGND
5
Vcc
6
PWGD
7
ISEN
14
HG
13
PGND
12
SD
FREQ 11
10
FB
9
SS
8
EAO
Figure 1. 14-Lead Plastic TSSOP
θJA = 155°C/W
See Package Number PW0014A
www.ti.com
PIN DESCRIPTION
BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the regulator
input voltage to properly turn on the high-side N-FET.
LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-through problems.
PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground.
SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground.
VCC (Pin 5) - Supply rail for the controller.
PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP, or UVLO mode. During
normal operation, this pin is connected to VCC or other voltage source through a pull-up resistor.
ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50µA current. A resistor of appropriate value should be connected
between this pin and the drain of the low-side FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to determine
the duty cycle. This pin is necessary for compensating the control loop.
SS (Pin 9) - Soft start pin. A capacitor connected between this pin and ground sets the speed at which the output voltage ramps up. Larger
capacitor value results in slower output voltage ramp but also lower inrush current.
FB (Pin 10) - This is the inverting input of the error amplifier, which is used for sensing the output voltage and compensating the control
loop.
FREQ (Pin 11) - The switching frequency is set by connecting a resistor between this pin and ground.
SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low the chip turns off the high side switch and turns on the low side switch. While
this pin is low, the IC will not start up. An internal 20µA pull-up connects this pin to VCC.
HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG to avoid shoot-through problems.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2 Submit Documentation Feedback
Copyright © 2002–2013, Texas Instruments Incorporated
Product Folder Links: LM2727 LM2737


Part Number LM2737
Description N-Channel FET Synchronous Buck Regulator Controller
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