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LM3743 Datasheet Preview

LM3743 Datasheet

PWM Buck Controller

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LM3743
www.ti.com
SNVS427E – SEPTEMBER 2006 – REVISED APRIL 2013
LM3743 High-Performance Synchronous Buck Controller with Comprehensive Fault
Protection Features
Check for Samples: LM3743
FEATURES
1
2 Input Voltage From 3.0V to 5.5V
• Output Voltage Adjustable Down to 0.8V
• Reference Accuracy: ±1.75%, over Full
Temperature and Input Voltage Range
• High-Side and Low-Side N-Channel MOSFETs
• Switching Frequency Options of 1 MHz or 300
kHz
• Comprehensive Fault Protection Features:
– High-Side Current Limit
– Low-Side Current Limit
– Output Under-Voltage Protection
• Hiccup Mode Protection Eliminates Thermal
Runaway During Fault Conditions
• Externally Programmable Soft-Start with
Tracking Capability
• Pre-Bias Start-Up Capability
• VSSOP-10 Package
DESCRIPTION
The LM3743 is a DC-DC voltage mode PWM buck
controller featuring synchronous rectification at 300
kHz or 1 MHz. It can deliver current as high as 20A
and step down from an input voltage between 3V and
5.5V down to a minimum output voltage of 0.8V, with
a ±1.75% internal reference accuracy. The LM3743
provides a set of comprehensive fault protection
features such as high-side current limit, output under-
voltage protection, and low-side current limit. When
any of these fault protection features are engaged, it
enters a hiccup protection mode which is suitable for
high reliability systems such as rack mounted servers
and telecom base station subsystems. The LM3743
also employs a proprietary monolithic glitch free pre-
bias start-up method suited for FPGA and ASIC logic
devices. An external programmable soft-start allows
for tracking and timing flexibility. The driver features
1.6of pull-up resistance and 1of pull-down drive
resistance for high power density and very efficient
power processing.
APPLICATIONS
• Rack-Mount Servers
• Telecom Base Stations
• Routers
• Printers/Scanners
• Multi-Media Set-Top Boxes
• FPGAs, ASICs, and DSPs
Typical Application
D1 VIN
R6 BOOT
VCC
HGATE
C10
+
Q1 C1
+
C2
C3 SW
LM3743 ILIM
R1
L1
VOUT
SS/TRACK
LGATE
C4
GND
COMP/EN
FB
C7
Q2
R5 C8
+ C5
R2
C9 R4
R3
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2013, Texas Instruments Incorporated




etcTI

LM3743 Datasheet Preview

LM3743 Datasheet

PWM Buck Controller

No Preview Available !

LM3743
SNVS427E – SEPTEMBER 2006 – REVISED APRIL 2013
Connection Diagram
1
VCC
10
BOOT
2
LGATE
9
HGATE
3
GND
LM3743
8
SW
4
ILIM
SS/TRACK 7
5
FB
COMP/EN 6
www.ti.com
Figure 1. 10-Lead Plastic VSSOP (Top View)
See Package Number DGS
VCC (Pin 1)
LGATE (Pin 2)
GND (Pin 3)
ILIM (Pin 4)
FB (Pin 5)
COMP/EN (Pin 6)
SS/TRACK (Pin 7)
SW (Pin 8)
HGATE (Pin 9)
BOOT (Pin 10)
PIN DESCRIPTIONS
Supply rail for the controller section of the IC. A minimum capacitance of 1 µF, preferably a multi-layer
ceramic capacitor type (MLCC), must be connected as close as possible to the VCC and GND pin and a
1 to 4.99resistance must be connected in series from the supply rail to the Vcc pin. See VCC Filtering
in the Design Consideration section for further details.
Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HGATE to avoid a shoot-
through problem.
Power ground (PGND) and signal ground (SGND). Connect the bottom feedback resistor between this
pin and the feedback pin.
Low side current limit threshold setting pin. This pin sources a fixed 50 µA current. A resistor of
appropriate value should be connected between this pin and the drain of the low-side N-FET.
Feedback pin. This is the inverting input of the error amplifier used for sensing the output voltage and
compensating the control loop.
Output of the error amplifier and enable pin. The voltage level on this pin is compared with an internally
generated ramp signal to determine the duty cycle. This pin is necessary for compensating the control
loop. Forcing this pin to ground will shut down the IC.
Soft-start and tracking pin. This pin is connected to the non-inverting input of the error amplifier during
initial soft-start, or any time the voltage is below the reference. To track the rising ramp of another power
supply's output, connect a resistor divider from the output of that supply to this pin as described in
Application Information.
Switch pin. The lower rail of the high-side N-FET driver. Also used for the high side current limit sensing.
Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LGATE to avoid a shoot-
through problem.
Supply rail for the N-channel MOSFET high gate drive. The voltage should be at least one gate
threshold above the regulator input voltage to properly turn on the high-side N-FET. See MOSFET
GATE DRIVE in the Application Information section for more details on how to select MOSFETs.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2 Submit Documentation Feedback
Product Folder Links: LM3743
Copyright © 2006–2013, Texas Instruments Incorporated


Part Number LM3743
Description PWM Buck Controller
Maker etcTI
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