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LMC6762 Datasheet Preview

LMC6762 Datasheet

CMOS Comparator

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LMC6762
www.ti.com
SNOS739D – JULY 1997 – REVISED MARCH 2013
LMC6762 Dual MicroPower Rail-To-Rail Input CMOS Comparator with Push-Pull Output
Check for Samples: LMC6762
FEATURES
1
2 (Typical Unless Otherwise Noted)
• Low Power Consumption (Max): IS = 10
μA/comp
• Wide Range of Supply Voltages: 2.7V to 15V
• Rail-To-Rail Input Common Mode Voltage
Range
• Rail-To-Rail Output Swing (Within 100 mV of
the Supplies, @ V+ = 2.7V, and ILOAD = 2.5 mA)
• Short Circuit Protection: 40 mA
• Propagation Delay (@ V+ = 5V, 100 mV
Overdrive): 4 μs
APPLICATIONS
• Laptop Computers
• Mobile Phones
• Metering Systems
• Hand-Held Electronics
• RC Timers
• Alarm and Monitoring Circuits
• Window Comparators, Multivibrators
DESCRIPTION
The LMC6762 is an ultra low power dual comparator
with a maximum supply current of 10 μA/comparator.
It is designed to operate over a wide range of supply
voltages, from 2.7V to 15V. The LMC6762 has
ensured specifications at 2.7V to meet the demands
of 3V digital systems.
The LMC6762 has an input common-mode voltage
range which exceeds both supplies. This is a
significant advantage in low-voltage applications. The
LMC6762 also features a push-pull output that allows
direct connections to logic devices without a pull-up
resistor.
A quiescent power consumption of 50 μW/amplifier
(@ V+ = 5V) makes the LMC6762 ideal for
applications in portable phones and hand-held
electronics. The ultra-low supply current is also
independent of power supply voltage. Ensured
operation at 2.7V and a rail-to-rail performance
makes this device ideal for battery-powered
applications.
Refer to the LMC6772 datasheet for an open-drain
version of this device.
Connection Diagram
Typical Application
8-Pin PDIP/SOIC
Top View
Zero Crossing Detector
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2013, Texas Instruments Incorporated




etcTI

LMC6762 Datasheet Preview

LMC6762 Datasheet

CMOS Comparator

No Preview Available !

LMC6762
SNOS739D – JULY 1997 – REVISED MARCH 2013
www.ti.com
Absolute Maximum Ratings(1)(2)
ESD Tolerance(3)
Differential Input Voltage
Voltage at Input/Output Pin
Supply Voltage (V+–V)
Current at Input Pin
Current at Output Pin(4)(5)
Current at Power Supply Pin, LMC6762
Lead Temperature (Soldering, 10 seconds)
Storage Temperature Range
Junction Temperature(6)
2 KV
(V+)+0.3V to (V)0.3V
(V+)+0.3V to (V)0.3V
16V
±5 mA
±30 mA
40 mA
260°C
65°C to +150°C
150°C
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) Human body model, 1.5 kΩ in series with 100 pF.
(4) Do not short circuit output to V+, when V+ is greater than 12V or reliability will be adversely affected.
(5) Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in
exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely
affect reliability.
(6) The maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD = (TJ(max) – TA)/θJA.All numbers apply for packages soldered directly into a PC board.
Operating Ratings(1)
Supply Voltage
Junction Temperature Range
Thermal Resistance (θJA)
LMC6762AI, LMC6762BI
P0008E Package, 8-Pin PDIP
D0008A Package, 8-Pin SOIC
2.7 VS 15V
40°C TJ +85°C
100°C/W
172°C/W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and the test
conditions, see the electrical characteristics.
2.7V Electrical Characteristics
Unless otherwise specified, all limits ensured for TJ = 25°C, V+ = 2.7V, V= 0V, VCM = V+/2. Boldface limits apply at the
temperature extremes.
Symbol
Parameter
Conditions
Typ (1)
LMC6762AI LMC6762BI
Limit (2)
Limit (2)
Units
VOS
Input Offset Voltage
3
5
15
mV
8
18
max
TCVOS Input Offset Voltage
2.0
Temperature Drift
Input Offset Voltage
See (3)
3.3
μV/°C
μV/Month
Average Drift
IB
Input Current
0.02
pA
IOS
Input Offset Current
0.01
pA
CMRR Common Mode Rejection Ratio
75
dB
PSRR Power Supply Rejection Ratio
±1.35V < VS < ±7.5V
80
dB
AV
Voltage Gain
(By Design)
100
dB
(1) Typical Values represent the most likely parametric norm.
(2) All limits are specified by testing or statistical analysis.
(3) Input Offset Voltage Average Drift is calculated by dividing the accelerated operating life drift average by the equivalent operational time.
The Input Offset Voltage Average Drift represents the input offset voltage change at worst-case input conditions.
2
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Copyright © 1997–2013, Texas Instruments Incorporated
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Part Number LMC6762
Description CMOS Comparator
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