LMK04010
Overview
The LMK04000 family of precision clock conditioners provides low-noise jitter cleaning, clock multiplication and distribution without the need for high-performance voltage controlled crystal oscillators (VCXO) module. Using a cascaded PLLatinum™ architecture combined with an external crystal and varactor diode, the LMK04000 family provides sub-200 femtosecond (fs) root mean square (RMS) jitter performance.
- 23 Cascaded PLLatinum™ PLL Architecture - PLL1 - Phase Detector Rate of up to 40 MHz - Integrated Low-Noise Crystal Oscillator Circuit - Dual Redundant Input Reference Clock with LOS - PLL2 - Normalized [1 Hz] PLL Noise Floor of 224 dBc/Hz - Phase Detector Rate up to 100 MHz - Input Frequency-Doubler - Integrated Low-Noise VCO
- Ultra-Low RMS Jitter Performance - 150 fs RMS Jitter (12 kHz - 20 MHz) - 200 fs RMS Jitter (100 Hz - 20 MHz)
- LVPECL/2VPECL, LVDS, and LVCMOS outputs
- Support Clock Rates up to 1080 MHz
- Default Clock Output (CLKout2) at power up
- Five Dedicated Channel Divider and Delay Blocks
- Pin Compatible Family of Clocking Devices
- Industrial Temperature Range: -40 to 85 °C
- 3.15 V to 3.45 V Operation
- Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
