SNVS295F – MAY 2004 – REVISED APRIL 2013
LP2997 DDR-II Termination Regulator
Check for Samples: LP2997
•2 Source and Sink Current
• Low Output Voltage Offset
• No External Resistors Required
• Linear Topology
• Suspend to Ram (STR) Functionality
• Low External Component Count
• Thermal Shutdown
• Available in SOIC-8, SO PowerPAD-8 Packages
• DDR-II Termination Voltage
• SSTL-18 Termination
The LP2997 linear regulator is designed to meet the
JEDEC SSTL-18 specifications for termination of
DDR-II memory. The device contains a high-speed
operational amplifier to provide excellent response to
load transients. The output stage prevents shoot
through while delivering 500mA continuous current
and transient peaks up to 900mA in the application as
required for DDR-II SDRAM termination. The LP2997
also incorporates a VSENSE pin to provide superior
load regulation and a VREF output as a reference for
the chipset and DIMMs.
An additional feature found on the LP2997 is an
active low shutdown (SD) pin that provides Suspend
To RAM (STR) functionality. When SD is pulled low
the VTT output will tri-state providing a high
impedance output, but, VREF will remain active. A
power savings advantage can be obtained in this
mode through lower quiescent current.
Typical Application Circuit
AV IN = 2.5V
VDDQ = 1.8V
VREF = 0.9V
V TT= 0.9V
Figure 1. Typical Application Circuit
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