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MSP430F5342 Datasheet Preview

MSP430F5342 Datasheet

Mixed-Signal Microcontrollers

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MSP430F5342, MSP430F5341, MSP430F5340
SLAS706F – JULY 2011 – REVISED SEPTEMBER 2018
MSP430F534x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
• Low Supply-Voltage Range:
3.6 V Down to 1.8 V
• Ultra-Low Power Consumption
– Active Mode (AM): All System Clocks Active
– 290 µA/MHz at 8 MHz, 3 V, Flash Program
Execution (Typical)
– 150 µA/MHz at 8 MHz, 3 V, RAM Program
Execution (Typical)
– Standby Mode (LPM3):
– Real-Time Clock (RTC) With Crystal,
Watchdog, and Supply Supervisor
Operational, Full RAM Retention, Fast
Wakeup:
1.9 µA at 2.2 V, 2.1 µA at 3 V (Typical)
– Low-Power Oscillator (VLO), General-
Purpose Counter, Watchdog, and Supply
Supervisor Operational, Full RAM Retention,
Fast Wakeup:
1.4 µA at 3 V (Typical)
– Off Mode (LPM4):
– Full RAM Retention, Supply Supervisor
Operational, Fast Wakeup:
1.1 µA at 3 V (Typical)
– Shutdown Mode (LPM4.5):
– 0.18 µA at 3 V (Typical)
• Wake up From Standby Mode in 3.5 µs (Typical)
• 16-Bit RISC Architecture, Extended Memory,
up to 25-MHz System Clock
• Flexible Power-Management System
– Fully Integrated LDO With Programmable
Regulated Core Supply Voltage
– Supply Voltage Supervision, Monitoring, and
Brownout
• Unified Clock System
– FLL Control Loop for Frequency Stabilization
1.2 Applications
• Analog Sensor Systems
• Digital Sensor Systems
– Low-Power Low-Frequency Internal Clock
Source (VLO)
– Low-Frequency Trimmed Internal Reference
Source (REFO)
– 32-kHz Watch Crystals (XT1)
– High-Frequency Crystals up to 32 MHz (XT2)
• 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
• 16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
• 16-Bit Timer TA2, Timer_A With Three
Capture/Compare Registers
• 16-Bit Timer TB0, Timer_B With Seven
Capture/Compare Shadow Registers
• Two Universal Serial Communication Interfaces
(USCIs)
– USCI_A0 and USCI_A1 Each Support:
– Enhanced UART With Automatic Baud-Rate
Detection
– IrDA Encoder and Decoder
– Synchronous SPI
– USCI_B0 and USCI_B1 Each Support:
– I2C
– Synchronous SPI
• 12-Bit Analog-to-Digital Converter (ADC) With
Internal Reference, Sample-and-Hold, and
Autoscan Feature
• Comparator
• Hardware Multiplier Supports 32-Bit Operations
• Serial Onboard Programming, No External
Programming Voltage Needed
• 3-Channel Internal DMA
• Basic Timer With RTC Feature
Device Comparison Summarizes the Available
Family Members
• Data Loggers
• General-Purpose Applications
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

MSP430F5342 Datasheet Preview

MSP430F5342 Datasheet

Mixed-Signal Microcontrollers

No Preview Available !

MSP430F5342, MSP430F5341, MSP430F5340
SLAS706F – JULY 2011 – REVISED SEPTEMBER 2018
www.ti.com
1.3 Description
The TI MSP family of ultra-low-power microcontrollers consists of several devices that feature different
sets of peripherals targeted for various applications. The architecture, combined with extensive low-power
modes, is optimized to achieve extended battery life in portable measurement applications. The
microcontroller features a powerful 16-bit RISC CPU, 16-bit registers, and a constant generator that
contribute to maximum code efficiency. The digitally controlled oscillator (DCO) allows the microcontroller
to wake up from low-power modes to active mode in 3.5 µs (typical).
The MSP430F534x MCU configurations feature four 16-bit timers, a high-performance 12-bit ADC, two
USCIs, a hardware multiplier, DMA, an RTC module with alarm capabilities, and 38 I/O pins.
For complete module descriptions, see the MSP430F5xx and MSP430F6xx Family User's Guide.
PART NUMBER
MSP430F5342IRGZ
MSP430F5341IRGZ
MSP430F5340IRGZ
Device Information(1)
PACKAGE
VQFN (48)
VQFN (48)
VQFN (48)
BODY SIZE(2)
7 mm × 7 mm
7 mm × 7 mm
7 mm × 7 mm
(1) For the most current part, package, and ordering information, see the Package Option Addendum in
Section 8, or see the TI website at www.ti.com.
(2) The sizes shown here are approximations. For the package dimensions with tolerances, see the
Mechanical Data in Section 8.
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram.
XIN XOUT RST/NMI DVCC DVSS VCORE AVCC AVSS
PA PB PC
P1.x P2.x P3.x P4.x P5.x P6.x
XT2IN
XT2OUT
Unified
Clock
System
ACLK
SMCLK
128KB
96KB
64KB
MCLK
Flash
CPUXV2
and
Working
Registers
MAB
MDB
10KB
8KB
6KB
RAM
Power
Management
SYS
Watchdog
LDO,
SVM, SVS,
Brownout
Port Map
Control
(P4)
I/O Ports
P1, P2
1×8 I/Os
1x1 I/Os
Interrupt
& Wakeup
PA
1×9 I/Os
I/O Ports
P3, P4
1×5 I/Os
1×8 I/Os
PB
1×13 I/Os
I/O Ports
P5, P6
1×7 I/Os
1×5 I/Os
PC
1×12 I/Os
USCI0,1
USCI_Ax:
UART,
IrDA, SPI
USCI_Bx:
SPI, I2C
DMA
3 Channel
EEM
(L: 8+2)
JTAG,
SBW
Interface
MPY32
TA0
Timer_A
5 CC
Registers
TA1
Timer_A
3 CC
Registers
TA2
Timer_A
3 CC
Registers
TB0
Timer_B
7 CC
Registers
RTC_A
CRC16
ADC12_A
12 bit
200 ksps
9 channels
(7 ext, 2 int)
Autoscan
REF
COMP_B
5 Channels
Figure 1-1. MSP430F534x Block Diagram
Copyright © 2016, Texas Instruments Incorporated
2 Device Overview
Copyright © 2011–2018, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430F5342 MSP430F5341 MSP430F5340


Part Number MSP430F5342
Description Mixed-Signal Microcontrollers
Maker etcTI
Total Page 30 Pages
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