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MSP430FR5738 Datasheet Preview

MSP430FR5738 Datasheet

Mixed-Signal Microcontrollers

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MSP430FR5739, MSP430FR5738, MSP430FR5737, MSP430FR5736, MSP430FR5735
MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, MSP430FR5730
SLAS639L – JULY 2011 – REVISED DECEMBER 2017
MSP430FR573x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
• Embedded Microcontroller
– 16-Bit RISC Architecture up to 24-MHz Clock
– Wide Supply Voltage Range (2 V to 3.6 V)
– –40°C to 85°C Operation
• Optimized Ultra-Low-Power Modes
– Active Mode: 81.4 µA/MHz (Typical)
– Standby (LPM3 With VLO): 6.3 µA (Typical)
– Real-Time Clock (RTC) (LPM3.5 With Crystal):
1.5 µA (Typical)
– Shutdown (LPM4.5): 0.32 µA (Typical)
• Ultra-Low-Power Ferroelectric RAM (FRAM)
– Up to 16KB of Nonvolatile Memory
– Ultra-Low-Power Writes
– Fast Write at 125 ns per Word (16KB in 1 ms)
– Built-In Error Correction Coding (ECC) and
Memory Protection Unit (MPU)
– Universal Memory = Program + Data + Storage
– 1015 Write Cycle Endurance
– Radiation Resistant and Nonmagnetic
• Intelligent Digital Peripherals
– 32-Bit Hardware Multiplier (MPY)
– Three-Channel Internal DMA
– Real-Time Clock (RTC) With Calendar and
Alarm Functions
– Five 16-Bit Timers With up to Three
Capture/Compare Registers
– 16-Bit Cyclic Redundancy Checker (CRC)
• High-Performance Analog
– 16-Channel Analog Comparator With Voltage
Reference and Programmable Hysteresis
– 12-Channel 10-Bit Analog-to-Digital Converter
(ADC) With Internal Reference and Sample-and-
Hold
– 200 ksps at 100-µA Consumption
• Enhanced Serial Communication
– eUSCI_A0 and eUSCI_A1 Support:
– UART With Automatic Baud-Rate Detection
– IrDA Encode and Decode
– SPI
– eUSCI_B0 Supports:
– I2C With Multiple-Slave Addressing
– SPI
– Hardware UART Bootloader (BSL)
• Power Management System
– Fully Integrated LDO
– Supply Voltage Supervisor for Core and Supply
Voltages With Reset Capability
– Always-On Zero-Power Brownout Detection
– Serial Onboard Programming With No External
Voltage Needed
• Flexible Clock System
– Fixed-Frequency DCO With Six Selectable
Factory-Trimmed Frequencies (Device
Dependent)
– Low-Power Low-Frequency Internal Clock
Source (VLO)
– 32-kHz Crystals (LFXT)
– High-Frequency Crystals (HFXT)
• Development Tools and Software
– Free Professional Development Environment
(Code Composer Studio™ IDE)
– Low-Cost Full-Featured Kit
(MSP-EXP430FR5739)
– Full Development Kit (MSP-FET430U40A)
– Target Board (MSP-TS430RHA40A)
• Family Members
– See Family Members for Available Device
Variants and Packages
– For Complete Module Descriptions, See the
MSP430FR57xx Family User's Guide
1.2 Applications
• Home Automation
• Security
• Sensor Management
• Data Acquisition
CAUTION
CAUTION
These products use FRAM nonvolatile memory technology. FRAM retention is sensitive to extreme temperatures,
such as those experienced during reflow or hand soldering. See Absolute Maximum Ratings for more information.
System-level ESD protection must be applied in compliance with the device-level ESD specification to prevent
electrical overstress or disturb of data or code memory. See MSP430™ System-Level ESD Considerations for more
information.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

MSP430FR5738 Datasheet Preview

MSP430FR5738 Datasheet

Mixed-Signal Microcontrollers

No Preview Available !

MSP430FR5739, MSP430FR5738, MSP430FR5737, MSP430FR5736, MSP430FR5735
MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, MSP430FR5730
SLAS639L – JULY 2011 – REVISED DECEMBER 2017
www.ti.com
1.3 Description
The TI MSP430FR573x family of ultra-low-power microcontrollers consists of multiple devices that feature
embedded FRAM nonvolatile memory, ultra-low-power 16-bit MSP430™ CPU, and different peripherals
targeted for various applications. The architecture, FRAM, and peripherals, combined with seven low-
power modes, are optimized to achieve extended battery life in portable and wireless sensing applications.
FRAM is a new nonvolatile memory that combines the speed, flexibility, and endurance of SRAM with the
stability and reliability of flash, all at lower total power consumption. Peripherals include a 10-bit ADC, a
16-channel comparator with voltage reference generation and hysteresis capabilities, three enhanced
serial channels capable of I2C, SPI, or UART protocols, an internal DMA, a hardware multiplier, an RTC,
five 16-bit timers, and digital I/Os.
PART NUMBER
Device Information(1)
PACKAGE
BODY SIZE(2)
MSP430FR5739RHA
VQFN (40)
6 mm × 6 mm
MSP430FR5739DA
TSSOP (38)
12.5 mm × 6.2 mm
MSP430FR5738RGE
VQFN (24)
4 mm × 4 mm
MSP430FR5738PW
TSSOP (28)
9.7 mm × 4.4 mm
MSP430FR5738YQD
DSBGA (24)
2 mm × 2 mm
(1) For the most current part, package, and ordering information, see the Package Option Addendum in Section 8, or see the TI website at
www.ti.com.
(2) The dimensions shown here are approximations. For the package dimensions with tolerances, see the Mechanical Data in Section 8.
1.4 Functional Block Diagram
Figure 1-1 shows the functional block diagram for the MSP430FR5731, MSP430FR5735, and
MSP430FR5739 devices in the RHA package. For the functional block diagrams for all device variants
and package options, see Section 6.1.
PJ.4/XIN PJ.5/XOUT
DVCC DVSS VCORE AVCC AVSS
PA PB
P1.x P2.x P3.x P4.x
Clock
System
ACLK
SMCLK
MCLK
16KB
(FR5739)
8KB
(FR5735)
4KB
(FR5731)
FRAM
Memory
Protection
Unit
CPUXV2
and
Working
Registers
MAB
MDB
1KB
RAM
Boot
ROM
Power
Management
SVS
SYS
Watchdog
REF
I/O Ports
P1/P2
2×8 I/Os
Interrupt,
Wake up
PA
1×16 I/Os
I/O Ports
P3/P4
1×8 I/Os
1×2 I/Os
Interrupt,
Wake up
PB
1×10 I/Os
DMA
3 Channel
RST/NMI/SBWTDIO
TEST/SBWTCK
PJ.0/TDO
PJ.1/TDI/TCLK
PJ.2/TMS
PJ.3/TCK
EEM
(S: 3+1)
JTAG,
SBW
Interface
MPY32
TA0 TB0
TA1 TB1
TB2
(2) Timer_A (3) Timer_B
3 CC
3 CC
Registers Registers
RTC_B
CRC
eUSCI_A0:
UART,
IrDA, SPI
eUSCI_B0:
SPI, I2C
eUSCI_A1:
UART,
IrDA, SPI
ADC10_B
10 bit
200 ksps
14 channels
(12 ext/2 int)
Comp_D
16 channels
Copyright © 2016, Texas Instruments Incorporated
Figure 1-1. Functional Block Diagram – RHA Package – MSP430FR5731, MSP430FR5735, MSP430FR5739
2 Device Overview
Copyright © 2011–2017, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: MSP430FR5739 MSP430FR5738 MSP430FR5737 MSP430FR5736 MSP430FR5735
MSP430FR5734 MSP430FR5733 MSP430FR5732 MSP430FR5731 MSP430FR5730


Part Number MSP430FR5738
Description Mixed-Signal Microcontrollers
Maker etcTI
Total Page 30 Pages
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