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SM320C80 - Digital Signal Processor

General Description

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3 GF Pin Assignments -- Alphabetical Listing

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Full PDF Text Transcription for SM320C80 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for SM320C80. For precise diagrams, and layout, please refer to the original PDF.

D Single-Chip Parallel Multiple Instruction/Multiple Data (MIMD) Digital Signal Processor (DSP) D More Than Two Billion RISC-Equivalent Operations per Second D Master Pro...

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re Than Two Billion RISC-Equivalent Operations per Second D Master Processor (MP) -- 32-Bit Reduced Instruction Set Computing (RISC) Processor -- IEEE-754 Floating-Point Capability -- 4K-Byte Instruction Cache -- 4K-Byte Data Cache D Four Parallel Processors (PP) -- 32-Bit Advanced DSPs -- 64-Bit Opcode Provides Many Parallel Operations per Cycle -- 2K-Byte Instruction Cache and 8K-Byte Data RAM per PP D Transfer Controller (TC) -- 64-Bit Data Transfers -- Up to 400 Megabytes per Second (MBps) Transfer Rate -- 32-Bit Addressing -- Direct DRAM/VRAM Interface With Dynamic Bus Sizing -- Intelligent Queuing and Cycle Prioritiz

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