Datasheet Summary
- State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
- ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
- Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
- Typical VOLP (Output Ground Bounce)
< 1 V at VCC = 5 V, TA = 25°C
- High-Drive Outputs (- 32-mA IOH,
64-mA IOL )
- Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (NT) and Ceramic (JT) DIPs description
SN54ABT646, SN74ABT646 OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCBS068E
- JULY 1991
- REVISED...