SN54AS194
Description
These 4-bit bidirectional universal shift registers feature parallel outputs, right-shift and left-shift serial (SR SER, SL SER) inputs, operatingmode-control (S0, S1) inputs, and a direct overriding clear (CLR) line.
Key Features
- Inhibit clock (temporary data latch/do nothing)
- Shift right (in the direction QA toward QD)
- Shift left (in the direction QD toward QA)
- Parallel (broadside) load
- POST OFFICE BOX 655303 DALLAS, TEXAS 75265
- POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
- POST OFFICE BOX 655303 DALLAS, TEXAS 75265
- POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
