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SN54HC590A Datasheet Preview

SN54HC590A Datasheet

8-BIT BINARY COUNTER

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D 2-V to 6-V VCC Operation
D High-Current 3-State Parallel Register
Outputs Can Drive Up To 15 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 14 ns
SN54HC590A . . . J OR W PACKAGE
SN74HC590A . . . D, DW, OR N PACKAGE
(TOP VIEW)
QB 1
QC 2
QD 3
QE 4
QF 5
QG 6
QH 7
GND 8
16 VCC
15 QA
14 OE
13 RCLK
12 CCKEN
11 CCLK
10 CCLR
9 RCO
SN54HC590A, SN74HC590A
8ĆBIT BINARY COUNTERS
WITH 3ĆSTATE OUTPUT REGISTERS
SCLS039F − DECEMBER 1982 − REVISED SEPTEMBER 2003
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D 8-Bit Counter With Register
D Counter Has Direct Clear
SN54HC590A . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
QD 4
18 OE
QE 5
17 RCLK
NC 6
16 NC
QF 7
15 CCKEN
QG 8
14 CCLK
9 10 11 12 13
description/ordering information
NC − No internal connection
The ’HC590A devices contain an 8-bit binary counter that feeds an 8-bit storage register. The storage register
has parallel outputs. Separate clocks are provided for both the binary counter and storage register. The binary
counter features direct clear (CCLR) and count-enable (CCKEN) inputs. A ripple-carry output (RCO) is provided
for cascading. Expansion is accomplished easily for two stages by connecting RCO of the first stage to CCKEN
of the second stage. Cascading for larger count chains can be accomplished by connecting RCO of each stage
to the counter clock (CCLK) input of the following stage.
CCLK and the register clock (RCLK) inputs are positive-edge triggered. If both clocks are connected together,
the counter state always is one count ahead of the register. Internal circuitry prevents clocking from the clock
enable.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N Tube of 25
SN74HC590AN
SN74HC590AN
Tube of 40
SN74HC590AD
−40°C to 85°C
SOIC − D
Reel of 2500
Reel of 250
SN74HC590ADR
SN74HC590ADT
HC590A
Tube of 40
SOIC − DW
Reel of 2000
SN74HC590ADW
SN74HC590ADWR
HC590A
CDIP − J
Tube of 25
SNJ54HC590AJ
SNJ54HC590AJ
−55°C to 125°C CFP − W
Tube of 150
SNJ54HC590AW
SNJ54HC590AW
LCCC - FK Tube of 55
SNJ54HC590AFK SNJ54HC590AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2003, Texas Instruments Incorporated
On products compliant to MILĆPRFĆ38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
1




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SN54HC590A Datasheet Preview

SN54HC590A Datasheet

8-BIT BINARY COUNTER

No Preview Available !

SN54HC590A, SN74HC590A
8ĆBIT BINARY COUNTERS
WITH 3ĆSTATE OUTPUT REGISTERS
SCLS039F − DECEMBER 1982 − REVISED SEPTEMBER 2003
timing diagram
OE
CCLR
CCKEN
CCLK
RCLK
ÎÎÎ COUNTER
ÎÎÎ (internal)
Don’t
Care
Hex 00
Hex 01
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ QA−QH
Don’t
Care
Hex 00
Hex 02 Hex 03 Hex 04 Hex 05 Hex FD Hex FE Hex FF Hex 00 Hex01
Hex 01
Hi-Z
Hex 01
Hex 05
Hex 00
RCO
TIMING SEQUENCE
1. Clear Counter (asynchronous).
2. Count up: 0x01. Store 0x00 in register.
3. Inhibit counter clock (CCKEN = HIGH). Store 0x01 in register.
4. Count 0x02, 0x03.
5. 3-state the outputs
6. Count up: 0x04
7. Enable outputs.
8. Continue up: 0x05
9. Store 0x05 in register.
10. Continue counting: 0x06...0xFD, 0xFE, 0xFF, 0x00, etc.
11. Store 0x00 in register.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265



Part Number SN54HC590A
Description 8-BIT BINARY COUNTER
Maker etcTI
Total Page 3 Pages
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