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SN54LV74A Datasheet Dual Positive-Edge-Triggered D-Type Flip-Flop

Manufacturer: Texas Instruments

Overview: Product Folder Sample & Buy Technical Documents Tools & Software Support & Community SN54LV74A, SN74LV74A SCLS381M – AUGUST 1997 – REVISED MARCH 2015 SNx4LV74A Dual Positive-Edge-Triggered D-Type Flip-Flops.

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General Description

These dual positive-edge-triggered D-type flip-flops are designed for 2-V to 5.5-V VCC operation.

Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) VQFN (14) 3.50 mm × 3.50 mm SOIC (14) 8.65 mm × 3.91 mm SN74LV74A SOP (14) 10.30 mm × 5.30 mm SSOP (14) 6.20 mm × 5.30 mm TSSOP (14) 5.00 mm × 4.40 mm (1) For all available packages, see the orderable addendum at the end of the data sheet.

Logic Diagram, Each Flip-Flop (Positive Logic) PRE CLK C C C Q TG C C D TG TG C C TG Q C C C CLR 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers.

Key Features

  • 1 2-V to 5.5-V VCC Operation.
  • Maximum tpd of 8.5 ns at 5 V.
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C.
  • Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C.
  • Support Mixed-Mode Voltage Operation on All Ports.
  • Ioff Supports Partial-Power-Down Mode Operation.
  • Latch-up Performance Exceeds 250 mA Per JESD 17.
  • ESD Protection Exceeds JESD 22.
  • 2000-V Human-Body Model (A114-A).

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