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SN65ALS180 Datasheet Preview

SN65ALS180 Datasheet

DIFFERENTIAL DRIVER AND RECEIVER PAIRS

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SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
D Meet or Exceed the Requirements of
TIA/EIA-422-B, TIA/EIA-485-Aand
ITU Recommendation V.11
D High-Speed Advanced Low-Power Schottky
Circuitry
D Designed for 25-Mbaud Operation in Both
Serial and Parallel Applications
D Low Skew Between Devices . . . 6 ns Max
D Low Supply-Current Requirements
. . . 30 mA Max
D Individual Driver and Receiver I/O Pins With
Dual VCC and Dual GND
D Wide Positive and Negative Input/Output
Bus Voltage Ranges
D Driver Output Capacity . . . ±60 mA
D Thermal Shutdown Protection
D Driver Positive- and Negative-Current
Limiting
D Receiver Input Impedance . . . 12 kMin
D Receiver Input Sensitivity . . . ±200 mV Max
D Receiver Input Hysteresis . . . 60 mV Typ
D Operate From a Single 5-V Supply
D Glitch-Free Power-Up and Power-Down
Protection
SLLS052G – AUGUST 1987 – REVISED APRIL 2003
SN65ALS180 . . . D PACKAGE
SN75ALS180 . . . D OR N PACKAGE
(TOP VIEW)
NC 1
R2
RE 3
DE 4
D5
GND 6
GND 7
14 VCC
13 VCC
12 A
11 B
10 Z
9Y
8 NC
NC – No internal connection
description/ordering information
The SN65ALS180 and SN75ALS180 differential driver and receiver pairs are integrated circuits designed for
bidirectional data communication on multipoint bus-transmission lines. They are designed for balanced
transmission lines and meet TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendation V.11.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP (N)
Tube of 25
SN75ALS180N
SN75ALS180N
0°C to 70°C
SOIC (D)
Tube of 50
Reel of 2500
SN75ALS180D
SN75ALS180DR
75ALS180
–40°C to 85°C SOIC (D)
Tube of 50
Reel of 2500
SN65ALS180D
SN65ALS180DR
65ALS180
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
These devices meet or exceed the requirements of TIA/EIA-485-A, except for the Generator Contention Test (para. 3.4.2) and the Generator
Current Limit (para. 3.4.3). The applied test voltage ranges are –6 V to 8 V for the SN75ALS180 and –4 V to 8 V for the SN65ALS180.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




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SN65ALS180 Datasheet Preview

SN65ALS180 Datasheet

DIFFERENTIAL DRIVER AND RECEIVER PAIRS

No Preview Available !

SN65ALS180, SN75ALS180
DIFFERENTIAL DRIVER AND RECEIVER PAIRS
SLLS052G AUGUST 1987 REVISED APRIL 2003
description/ordering information (continued)
The SN65ALS180 and SN75ALS180 combine a 3-state differential line driver and a differential input line
receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and
active-low enables, respectively, that can be connected together externally to function as a direction control.
The driver differential outputs and the receiver differential inputs are connected to separate terminals for greater
flexibility and are designed to offer minimum loading to the bus when the driver is disabled or VCC = 0.
These ports feature wide positive and negative common-mode voltage ranges, making the device suitable for
party-line applications.
Function Tables
INPUT
D
H
L
X
DRIVER
ENABLE
DE
OUTPUTS
Y
Z
H
H
L
H
L
H
L
Z
Z
RECEIVER
DIFFERENTIAL INPUTS ENABLE OUTPUT
AB
RE
R
VID 0.2 V
L
H
0.2 V < VID < 0.2 V
L
?
VID 0.2 V
L
L
X
H
Z
Open
L
H
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
DE 4
D5
RE 3
R2
9
Y
10
Z
12
A
11
B
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN65ALS180
Description DIFFERENTIAL DRIVER AND RECEIVER PAIRS
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