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SN65LBC176A-EP Datasheet Preview

SN65LBC176A-EP Datasheet

Differential Bus Transceivers

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ąą
D Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
−40°C to 125°C and −55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree
D High-Speed Low-Power LinBiCMOS
Circuitry Designed for Signaling RatesUp
to 30 Mbps
D Bus-Pin ESD Protection Exceeds 12-kV
HBM
D Compatible With ANSI Standard
TIA/EIA-485-A and ISO 8482:1987(E)
D Low Skew
D Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
D Low Disabled Supply Current
Requirements . . . 700 µA Maximum
D Common-Mode Voltage Range of −7 V
to 12 V
D Thermal-Shutdown Protection
D Driver Positive and Negative Current
Limiting
D Open-Circuit Fail-Safe Receiver Design
D Receiver Input Sensitivity . . . ± 200 mV Max
D Receiver Input Hysteresis . . . 50 mV Typ
D Glitch-Free Power-Up and Power-Down
Protection
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
Signaling rate by TIA/EIA-485-A definition restrict transition times
to 30% of the bit length, and much higher signaling rates may be
achieved without this requirement as displayed in the TYPICAL
CHARACTERISTICS of this device.
SN65LBC176AĆEP
DIFFERENTIAL BUS TRANSCEIVER
ą
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
D Package
(TOP VIEW)
R1
RE 2
DE 3
D4
8 VCC
7B
6A
5 GND
logic diagram (positive logic)
3
DE
4
D
2
RE
1
R
6
A
7B
Bus
Function Tables
INPUT
D
H
L
X
Open
DRIVER
ENABLE
DE
H
H
L
H
OUTPUTS
AB
HL
LH
ZZ
HL
RECEIVER
DIFFERENTIAL INPUTS
VA −VB
VID 0.2 V
−0.2 V < VID < 0.2 V
VID − 0.2 V
X
Open
ENABLE
RE
L
L
L
H
L
OUTPUT
R
H
?
L
Z
H
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS and LinASIC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2004, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




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SN65LBC176A-EP Datasheet Preview

SN65LBC176A-EP Datasheet

Differential Bus Transceivers

No Preview Available !

SN65LBC176AĆEP
ą
DIFFERENTIAL BUS TRANSCEIVER
ą
SGLS151C − DECEMBER 2002 − REVISED JULY 2004
description/ordering information
The SN65LBC176A-EP differential bus transceiver is a monolithic, integrated circuits designed for bidirectional
data communication on multipoint bus-transmission lines. The SN65LBC176A-EP is designed for balanced
transmission lines and is compatible with ANSI standard TIA/EIA-485-A and ISO 8482. The SN65LBC176A-EP
offers improved switching performance over its predecessors without sacrificing significantly more power.
The SN65LBC176A-EP combines a 3-state, differential line driver and a differential input line receiver, both of
which operate from a single 5-V power supply. The driver and receiver have active-high and active-low enables,
respectively, which can externally connect together to function as a direction control. The driver differential
outputs and the receiver differential inputs connect internally to form a differential input/output (I/O) bus port that
is designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. This port features
wide positive and negative common-mode voltage ranges, making the device suitable for party-line
applications. Low device supply current can be achieved by disabling the driver and the receiver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C
SOIC − D Tape and Reel SN65LBC176AQDREP
176AEP
−55°C to 125°C
SOIC − D Tape and Reel SN65LBC176AMDREP
176MEP
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
schematics of inputs and outputs
D, DE, and RE Inputs
Input
100 k
1 k
VCC
Input
A Input
VCC
16 V 100 k
18 k
4 k
8V
16 V
4 k
VCC
R Output
40
Output
8V
Input
B Input
VCC
16 V
18 k
4 k
16 V
100 k
4 k
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN65LBC176A-EP
Description Differential Bus Transceivers
Maker etcTI
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