SN65LVCP402 Datasheet | Texas Instruments

FEATURES - Up to 4.25 Gbps Operation - Non-blocking Architecture Allows Each Output to be Connected to Any Input - 30 ps of Deterministic Jitter - Selectable Transmit Pre-Emphasis Per Lane - Receive Equalization - Available Packaging 24 Pin QFN - Propagation Delay Times: 500 ps Typical - Inputs Electrically patible With CML Signal Levels - Operates From a Single 3.3-V Supply - Ability to 3-STATE Outputs - Low Power: 290 m W (typ) - Integrated Termination Resistors APPLICATIONS - Clock Buffering/Clock MUXing - Wireless Base Stations - High-Speed Network Routing - Tele/Data - XAUI 802.3ae Protocol Backplane Redundancy DESCRIPTION The SN65LVCP402 is a 2x2 non-blocking crosspoint switch in a flow-through pin-out allowing for ease in PCB layout. VML signaling is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 2:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve the high signaling speeds while maintaining low signal skews. The SN65LVCP402 incorporates 100-Ω termination resistors for those applications where board space is a premium. Built-in transmit pre-emphasis and receive equalization for superior signal integrity performance. The SN65LVCP402 is characterized for operation from -40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007- 2009, Texas Instruments Incorporated SLLS699A - JUNE 2007 - REVISED JANUARY 2009...