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SN65LVDT101 - Differential Translator/Repeater

Download the SN65LVDT101 datasheet PDF. This datasheet also covers the SN65LVDS100 variant, as both devices belong to the same differential translator/repeater family and are provided as variant models within a single manufacturer datasheet.

General Description

The SN65LVDS100, SN65LVDT100, SN65LVDS101, and SN65LVDT101 are high-speed differential receivers and drivers connected as repeaters.

Key Features

  • 1 Designed for Signaling Rates ≥ 2 Gbps.
  • Total Jitter < 65 ps.
  • Low-Power Alternative for the MC100EP16.
  • Low 100-ps (Maximum) Part-to-Part Skew.
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Input Voltage Range.
  • Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels.
  • 3.3-V Supply Operation.
  • LVDT Integrates 110-Ω Terminating Resistor.
  • Offered in SOIC and MSOP 2.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN65LVDS100-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Product Folder Sample & Buy Technical Documents Tools & Software Support & Community Reference Design SN65LVDS100, SN65LVDT100, SN65LVDS101, SN65LVDT101 SLLS516E – AUGUST 2002 – REVISED JULY 2015 SN65LVDx10x Differential Translator/Repeater 1 Features •1 Designed for Signaling Rates ≥ 2 Gbps • Total Jitter < 65 ps • Low-Power Alternative for the MC100EP16 • Low 100-ps (Maximum) Part-to-Part Skew • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Input Voltage Range • Inputs Electrically Compatible With LVPECL, CML, and LVDS Signal Levels • 3.