SN65LVDT352 Datasheet | Texas Instruments

FEATURES - Meets or Exceeds the Requirements of ANSI TIA/EIA-644A Standard - Single-Channel Signaling Rates up to 560 Mbps - -4 V to 5 V mon-Mode Input Voltage Range - Flow-Through Architecture - Active Failsafe Assures a High-level Output When an Input Signal Is not Present - SN65LVDS348 Provides a Wide mon Mode Range Replacement for the SN65LVDS048A or the DS90LV048A APPLICATIONS - Logic Level Translator - Point-to-Point Baseband Data Transmission Over 100-Ω Media - ECL/PECL-to-LVTTL Conversion - Wireless Base Stations - Central Office or PABX Switches DESCRIPTION The SN65LVDS348, SN65LVDT348, SN65LVDS352, and SN65LVDT352 are high-speed, quadruple differential receivers with a wide mon-mode input voltage range. This allows receipt of TIA/EIA-644 signals with up to 3-V of ground noise or a variety of differential and single-ended logic levels. The '348 is in a 16-pin package to match the industry-standard footprint of the DS90LV048. The '352 adds two additional VCC and GND pins in a 24-pin package to provide higher data transfer rates with multiple receivers in operation. All offer a flow-through architecture with all inputs on one side and outputs on the other to ease board layout and reduce crosstalk between receivers. LVDT versions of both integrate a 110-Ω line termination resistor. These receivers also provide 3x the standard's minimum mon-mode noise voltage tolerance. The -4 V to 5 V mon-mode range allows usage in harsh operating environments or accepts LVPECL, PECL, LVECL, ECL, CMOS, and LVCMOS levels without level shifting circuitry. See the Application Information Section for more details on the ECL/PECL to LVDS interface. DATA TRANSFER RATE vs FREE-AIR TEMPERATURE 550 SN65LVDS352PW 500 LVDT Device Only Timer Data Transfer Rate - Mxfr/s SN65LVDS348PW 350 250 215 -1 prbs NRZ, VID = 0.4 V VIC = 1.2 V, CL = 5.5 p F, 40% Open Eye 4 Receivers Switching, Input Jitter < 45 ps 200 -60 -40 -20 0 20 40 60 80 100 TA - Free-Air...