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D Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design
Significantly Reduces Power Dissipation
D Flow-Through Architecture Optimizes
PCB Layout
D Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D Package Options Include Plastic
Small-Outline (DW) Package, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
SN54ABT2827, SN74ABT2827 10-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997
SN54ABT2827 . . . JT PACKAGE SN74ABT2827 . . .
SN74ABT2827 Datasheet
