Datasheet Summary
SN54ACT8990, SN74ACT8990
TEST-BUS CONTROLLERS IEEE STD 1149.1 (JTAG) TAP MASTERS WITH 16-BIT GENERIC HOST INTERFACES
SCAS190E
- JUNE 1990
- REVISED JANUARY 1997
D Members of the Texas Instruments
SCOPE ™ Family of Testability Products
D patible With the IEEE Standard
1149.1-1990 (JTAG) Test Access Port and
Boundary-Scan Architecture
D Control Operation of Up to Six Parallel
Target Scan Paths
D Acmodate Pipeline Delay to Target of
Up to 31 Clock Cycles
D Scan Data Up to 232 Clock Cycles
D Execute Instructions for Up to 232 Clock
Cycles
D Each Device Includes Four Bidirectional
Event Pins for Additional Test Capability
D Inputs Are TTL-Voltage patible D EPIC ™ (Enhanced-Performance...