SN74ALVCH16901 Datasheet - Texas Instruments

SN74ALVCH16901 18-BIT UNIVERSAL BUS TRANSCEIVER

ordering information This 18-bit (dual-octal) noninverting registered transceiver is designed for 1.65-V to 3.6-V VCC operation. The SN74ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity fr.

SN74ALVCH16901 18ĆBIT UNIVERSAL BUS TRANSCEIVER WITH PARITY GENERATORS/CHECKERS SCES010F JULY 1995 REVISED SEPTEMBER 2004 D Member of the Texas Instruments Widebus Family D UBT  Transceiver Combines D-Type Latches and D-Type Flip-Flops for Operation in Transparent, Latched, or Clocked Mode D Operates From 1.65 V to 3.6 V D Max tpd of 4.4 ns at 3.3 V D ±24-mA Output Drive at 3.3 V D Simultaneously Generates and Checks Parity D Option to Select Generate Parity and Check or F.

SN74ALVCH16901 Features

* independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual 9-bit clock-enable (CLKENAB or CLKENBA) inputs. It also provides parity-enable (SEL) and parity-select (ODD/EVEN) inputs and separate error-signal (ERRA or ERRB) outputs for checking parity. The direction of data flow is contr

SN74ALVCH16901-etcTI.pdf