SN74AUC00 - QUADRUPLE 2-INPUT POSITIVE-NAND GATE

Product Overview

Texas Instruments

Datasheet Details

Part number	SN74AUC00
Manufacturer	Texas Instruments
File Size	814.91 KB
Description	QUADRUPLE 2-INPUT POSITIVE-NAND GATE
Datasheet	SN74AUC00 Datasheet
Additional preview pages of the SN74AUC00 datasheet.

Product details

Description

ORDERING INFORMATION This quadruple 2-input positive-NAND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.The SN74AUC00 devices perform the Boolean function Y = A ⋅ B or Y = A + B in positive logic.This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.TA 40°C to 85°C QFN

Features

Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation.
Ioff Supports Partial-Power-Down Mode Operation.
Sub-1-V Operable.
Max tpd of 2 ns at 1.8 V.
Low Power Consumption, 10-µA Max ICC.
±8-mA Output Drive at 1.8 V.
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II.
ESD Protection Exceeds JESD 22.
2000-V Human-Body Model (A114-A).
200-V Machine Model (A115-A).

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Published: Aug 31, 2021 |