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SN74AUC32244 Datasheet Preview

SN74AUC32244 Datasheet

32-BIT BUFFER/DRIVER

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SN74AUC32244
32ĆBIT BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCES425 − FEBRUARY 2003
D Member of the Texas Instruments
Widebus+Family
D Optimized for 1.8-V Operation and is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D Ioff Supports Partial-Power-Down Mode
Operation
D Sub 1-V Operable
D Max tpd of 1.8 ns at 1.8 V
D Low Power Consumption, 40-µA Max ICC
D ±8-mA Output Drive at 1.8 V
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 32-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V
VCC operation.
The SN74AUC32244 is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides
true outputs and symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 85°C LFBGA − GKE Tape and reel SN74AUC32244GKER
MM244
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2003, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




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SN74AUC32244 Datasheet Preview

SN74AUC32244 Datasheet

32-BIT BUFFER/DRIVER

No Preview Available !

SN74AUC32244
32ĆBIT BUFFER/DRIVER
WITH 3ĆSTATE OUTPUTS
SCES425 − FEBRUARY 2003
GKE PACKAGE
(TOP VIEW)
123456
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
terminal assignments
1
2
3
4
5
6
A
1Y2
1Y1
1OE
2OE
1A1
1A2
B
1Y4
1Y3
GND
GND
1A3
1A4
C
2Y2
2Y1
VCC
VCC
2A1
2A2
D
2Y4
2Y3
GND
GND
2A3
2A4
E
3Y2
3Y1
GND
GND
3A1
3A2
F
3Y4
3Y3
VCC
VCC
3A3
3A4
G
4Y2
4Y1
GND
GND
4A1
4A2
H
4Y3
4Y4
4OE
3OE
4A4
4A3
J
5Y2
5Y1
5OE
6OE
5A1
5A2
K
5Y4
5Y3
GND
GND
5A3
5A4
L
6Y2
6Y1
VCC
VCC
6A1
6A2
M
6Y4
6Y3
GND
GND
6A3
6A4
N
7Y2
7Y1
GND
GND
7A1
7A2
P
7Y4
7Y3
VCC
VCC
7A3
7A4
R
8Y2
8Y1
GND
GND
8A1
8A2
T
8Y3
8Y4
8OE
7OE
8A4
8A3
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OE
A
OUTPUT
Y
L
H
H
L
L
L
H
X
Z
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN74AUC32244
Description 32-BIT BUFFER/DRIVER
Maker etcTI
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SN74AUC32244 Datasheet PDF






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