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SN74AUP1G74 Datasheet Preview

SN74AUP1G74 Datasheet

Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

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SN74AUP1G74
SCES644D – MARCH 2006 – REVISED DECEMBER 2015
SN74AUP1G74 Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
With Clear and Preset
1 Features
1 Available in the Texas Instruments NanoStar™
Package
• Low Static-Power Consumption:
ICC = 0.9 μA Maximum
• Low Dynamic-Power Consumption:
Cpd = 5.5 pF Typical at 3.3 V
• Low Input Capacitance: Ci = 1.5 pF Typical
• Low Noise – Overshoot and Undershoot
< 10% of VCC
• Ioff Supports Partial-Power-Down Mode Operation
• Schmitt-Trigger Action Allows Slow Input
Transition and Better Switching Noise Immunity at
the Input
(Vhys = 250 mV Typical at 3.3 V)
• Wide Operating VCC Range of 0.8 V to 3.6 V
• Optimized for 3.3-V Operation
• 3.6-V I/O Tolerant to Support Mixed-Mode Signal
Operation
• tpd = 5 ns Maximum at 3.3 V
• Suitable for Point-to-Point Applications
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model (A114-B, Class II)
– 1000-V Charged-Device Model (C101)
2 Applications
• Servers
• LED Displays
• Network Switches
• Telecom Infrastructure
• Motor Drivers
• I/O Expanders
3 Description
The AUP family is TI's premier solution to the
industry's low-power needs in battery-powered
portable applications. This family ensures a very low
static- and dynamic-power consumption across the
entire VCC range of 0.8 V to 3.6 V, resulting in
increased battery life. This product also maintains
excellent signal integrity (see the very low undershoot
and overshoot characteristics shown in Figure 6).
Device Information(1)
PART NUMBER
PACKAGE BODY SIZE (NOM)
SN74AUP1G74YFP
DSBGA (8)
1.56 mm × 0.76 mm
SN74AUP1G74YZP
DSBGA (8)
1.86 mm × 0.89 mm
SN74AUP1G74DCU VSSOP (8)
2.30 mm × 2.00 mm
SN74AUP1G74DQE X2SON (8)
1.40 mm × 1.00 mm
SN74AUP1G74RSE UQFN (8)
1.50 mm × 1.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
AUP – The Lowest-Power Family
CLR 6
CLK 1
C
C
C
TG
3
Q
C
C
D2
TG
TG
C
C
TG
5Q
C
C
C
PRE 7
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




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SN74AUP1G74 Datasheet Preview

SN74AUP1G74 Datasheet

Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop

No Preview Available !

SN74AUP1G74
SCES644D – MARCH 2006 – REVISED DECEMBER 2015
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions ...................... 4
6.4 Thermal Information .................................................. 5
6.5 Electrical Characteristics, TA = 25°C ........................ 5
6.6 Electrical Characteristics, TA = –40°C to +85°C ....... 6
6.7 Timing Requirements ................................................ 7
6.8 Switching Characteristics, CL = 5 pF ........................ 8
6.9 Switching Characteristics, CL = 10 pF ...................... 9
6.10 Switching Characteristics, CL = 15 pF .................. 10
6.11 Switching Characteristics, CL = 30 pF .................. 11
6.12 Operating Characteristics...................................... 12
6.13 Typical Characteristics .......................................... 12
7 Parameter Measurement Information ............... 13
7.1 Propagation Delays, Setup and Hold Times, and
Pulse Width)............................................................. 13
7.2 Enable and Disable Times ...................................... 14
8 Detailed Description ............................................ 15
8.1 Overview ................................................................. 15
8.2 Functional Block Diagram ....................................... 15
8.3 Feature Description................................................. 15
8.4 Device Functional Modes........................................ 15
9 Application and Implementation ........................ 16
9.1 Application Information .......................................... 16
9.2 Typical Power Button Circuit .................................. 16
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
12 Device and Documentation Support ................. 18
12.1 Documentation Support ........................................ 18
12.2 Community Resources.......................................... 18
12.3 Trademarks ........................................................... 18
12.4 Electrostatic Discharge Caution ............................ 18
12.5 Glossary ................................................................ 18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2010) to Revision D
Page
• Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
2
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Copyright © 2006–2015, Texas Instruments Incorporated
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Part Number SN74AUP1G74
Description Low-Power Single Positive-Edge-Triggered D-Type Flip-Flop
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