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SN74AUP2G125 - LOW-POWER DUAL BUS BUFFER GATE

General Description

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications.

This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life.

Key Features

  • 1.
  • Available in the Texas Instruments NanoStar™ Package.
  • Low Static-Power Consumption (ICC = 0.9 mA Max).
  • Low Dynamic-Power Consumption (Cpd = 4 pF Typ at 3.3 V).
  • Low Input Capacitance (CI = 1.5 pF Typ).
  • Low Noise.
  • Overshoot and Undershoot.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74AUP2G125 www.ti.com SCES688D – JANUARY 2007 – REVISED MAY 2010 LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS Check for Samples: SN74AUP2G125 FEATURES 1 • Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption (ICC = 0.9 mA Max) • Low Dynamic-Power Consumption (Cpd = 4 pF Typ at 3.3 V) • Low Input Capacitance (CI = 1.5 pF Typ) • Low Noise – Overshoot and Undershoot <10% of VCC • Input-Disable Feature Allows Floating Input Conditions • Ioff Supports Partial-Power-Down Mode Operation • Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at Input • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 5.4 ns Max at 3.