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SN74AUP2G34 - LOW-POWER DUAL BUFFER GATE

General Description

applications.

Key Features

  • 1.
  • Available in the Texas Instruments NanoStar™ Package.
  • Low Static-Power Consumption: ICC = 0.9 mA Max.
  • Low Dynamic-Power Consumption: Cpd = 4.3 pF Typ at 3.3 V.
  • Low Input Capacitance: Ci = 1.5 pF Typ.
  • Low Noise: Overshoot and Undershoot.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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SN74AUP2G34 www.ti.com SCES751B – SEPTEMBER 2009 – REVISED MARCH 2010 LOW-POWER DUAL BUFFER GATE Check for Samples: SN74AUP2G34 FEATURES 1 • Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption: ICC = 0.9 mA Max • Low Dynamic-Power Consumption: Cpd = 4.3 pF Typ at 3.3 V • Low Input Capacitance: Ci = 1.5 pF Typ • Low Noise: Overshoot and Undershoot <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Wide Operating VCC Range of 0.8 V to 3.6 V • Optimized for 3.3-V Operation • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 4.3 ns Max at 3.