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SN74BCT374N - Octal Edge-Triggered D-Type Latches

Download the SN74BCT374N datasheet PDF. This datasheet also covers the SN74BCT374 variant, as both devices belong to the same octal edge-triggered d-type latches family and are provided as variant models within a single manufacturer datasheet.

General Description

The SNx4BCT374 devices contain eight channels of D-type flip-flops with a shared clock (CLK) and output enable (OE) pin.

Key Features

  • Operating Voltage Range of 4.5 V to 5.5 V.
  • BiCMOS Design Significantly Reduces ICCZ Over TTL Designs.
  • Full Parallel Access for Loading.
  • Buffered Control Inputs.
  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers 2.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN74BCT374-etcTI.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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SN74106 Dual J-K Flip-Flop ETC
SN74108 Dual J-K Flip Flop ETC

Other Datasheets by Texas Instruments

Part Number Description
SN74BCT374 Octal Edge-Triggered D-Type Latches
SN74BCT125A QUADRUPLE BUS BUFFER GATES
SN74BCT125AN QUADRUPLE BUS BUFFER GATES
SN74BCT126A QUADRUPLE BUS BUFFER GATES
SN74BCT2240 OCTAL BUFFERS AND LINE/MOS DRIVERS

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.ti.com SN74BCT374 SCBS019D – SEPTEMBER 1988 – REVISED SFENB7R4UBARCYT2307241 SCBS019D – SEPTEMBER 1988 – REVISED FEBRUARY 2021 SNx4BCT374 Octal Edge-Triggered D-Type Latches With 3-State Outputs 1 Features • Operating Voltage Range of 4.5 V to 5.5 V • BiCMOS Design Significantly Reduces ICCZ Over TTL Designs • Full Parallel Access for Loading • Buffered Control Inputs • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers 2 Applications • Buffer Registers • I/O Ports • Bus Drivers • Working Registers 3 Description The SNx4BCT374 devices contain eight channels of D-type flip-flops with a shared clock (CLK) and output enable (OE) pin. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74BCT374N PDIP (20) 25.40 mm × 6.35 mm SN74BCT374DW SOIC (20) 12.