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SN74CBT3125D Datasheet Preview

SN74CBT3125D Datasheet

QUADRUPLE FET BUS SWITCH

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SN74CBT3125
QUADRUPLE FET BUS SWITCH
D Standard ’125-Type Pinout (D, DB, DGV,
and PW Packages)
SCDS021I − MAY 1995 − REVISED SEPTEMBER 2002
D 5-Ω Switch Connection Between Two Ports
D TTL-Compatible Input Levels
D, DB, DGV, OR PW PACKAGE
(TOP VIEW)
1OE 1
1A 2
1B 3
2OE 4
2A 5
2B 6
GND 7
14 VCC
13 4OE
12 4A
11 4B
10 3OE
9 3A
8 3B
RGY PACKAGE
(TOP VIEW)
1
1A 2
1B 3
2OE 4
2A 5
2B 6
7
14
13 4OE
12 4A
11 4B
10 3OE
9 3A
8
DBQ PACKAGE
(TOP VIEW)
NC 1
1OE 2
1A 3
1B 4
2OE 5
2A 6
2B 7
GND 8
16 VCC
15 4OE
14 4A
13 4B
12 3OE
11 3A
10 3B
9 NC
NC − No internal connection
description/ordering information
The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled
when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN − RGY
Tape and reel SN74CBT3125RGYR CU125
SOIC − D
Tube
Tape and reel
SN74CBT3125D
SN74CBT3125DR
CBT3125
−40°C to 85°C SSOP − DB
Tape and reel
SSOP (QSOP) − DBQ Tape and reel
SN74CBT3125DBR CU125
SN74CBT3125DBQR CU125
TSSOP − PW
Tape and reel SN74CBT3125PWR CU125
TVSOP − DGV
Tape and reel SN74CBT3125DGVR CU125
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each bus switch)
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2002, Texas Instruments Incorporated
1




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SN74CBT3125D Datasheet Preview

SN74CBT3125D Datasheet

QUADRUPLE FET BUS SWITCH

No Preview Available !

SN74CBT3125
QUADRUPLE FET BUS SWITCH
SCDS021I − MAY 1995 − REVISED SEPTEMBER 2002
logic diagram (positive logic)
2
1A
1
1OE
5
2A
4
2OE
9
3A
10
3OE
12
4A
3
1B
6
2B
8
3B
11
4B
13
4OE
Pin numbers shown are for the D, DB, DGV, PW, and RGY packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 2): DBQ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
MIN MAX UNIT
VCC Supply voltage
4 5.5 V
VIH High-level control input voltage
2
V
VIL Low-level control input voltage
0.8 V
TA Operating free-air temperature
−40 85 °C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN74CBT3125D
Description QUADRUPLE FET BUS SWITCH
Maker etcTI
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