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SN74F126
QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
SDFS017B – JANUARY 1989 – REVISED NOVEMBER 2002
D 4.5-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
description/ordering information
The SN74F126 bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low.
D, N, OR NS PACKAGE (TOP VIEW)
1OE 1 1A 2 1Y 3
2OE 4 2A 5 2Y 6
GND 7
14 VCC 13 4OE 12 4A 11 4Y 10 3OE 9 3A 8 3Y
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
SN74F126 Datasheet
