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SN74F74N - DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS

Download the SN74F74N datasheet PDF (SN74F74 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for dual positive-edge-triggered d-type flip-flops.

Description

These devices contain two independent positiveedge-triggered D-type flip-flops.

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN74F74-etcTI.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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SN54F74, SN74F74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SDFS046A – MARCH 1987 – REVISED OCTOBER 1993 • Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These devices contain two independent positiveedge-triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse.
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