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SN74LVCH16952A Datasheet Preview

SN74LVCH16952A Datasheet

16-BIT REGISTERED TRANSCEIVER

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www.ti.com
FEATURES
Member of the Texas Instruments Widebus™
Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 6.6 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage
With 3.3-V VCC)
Ioff Supports Partial-Power-Down Mode
Operation
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit registered transceiver is designed for
1.65-V to 3.6-V VCC operation.
The SN74LVCH16952A contains two sets of D-type
flip-flops for temporary storage of data flowing in
either direction. The device can be used as two 8-bit
transceivers or one 16-bit transceiver. Data on the A
or B bus is stored in the registers on the low-to-high
transition of the clock (CLKAB or CLKBA) input,
provided that the clock-enable (CEAB or CEBA) input
is low. Taking the output-enable (OEAB or OEBA)
input low accesses the data on either port.
SN74LVCH16952A
16-BIT REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS320L – NOVEMBER 1993 – REVISED MARCH 2005
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1OEAB 1
1CLKAB 2
1CEAB 3
GND 4
1A1 5
1A2 6
VCC 7
1A3 8
1A4 9
1A5 10
GND 11
1A6 12
1A7 13
1A8 14
2A1 15
2A2 16
2A3 17
GND 18
2A4 19
2A5 20
2A6 21
VCC 22
2A7 23
2A8 24
GND 25
2CEAB 26
2CLKAB 27
2OEAB 28
56 1OEBA
55 1CLKBA
54 1CEBA
53 GND
52 1B1
51 1B2
50 VCC
49 1B3
48 1B4
47 1B5
46 GND
45 1B6
44 1B7
43 1B8
42 2B1
41 2B2
40 2B3
39 GND
38 2B4
37 2B5
36 2B6
35 VCC
34 2B7
33 2B8
32 GND
31 2CEBA
30 2CLKBA
29 2OEBA
TA
–40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
SSOP – DL
Tube
Tape and reel
SN74LVCH16952ADL
SN74LVCH16952ADLR
TSSOP – DGG Tape and reel
SN74LVCH16952ADGGR
TVSOP – DGV Tape and reel
SN74LVCH16952ADGVR
TOP-SIDE MARKING
LVCH16952A
LVCH16952A
LDH952A
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1993–2005, Texas Instruments Incorporated




etcTI

SN74LVCH16952A Datasheet Preview

SN74LVCH16952A Datasheet

16-BIT REGISTERED TRANSCEIVER

No Preview Available !

SN74LVCH16952A
16-BIT REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS320L – NOVEMBER 1993 – REVISED MARCH 2005
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input
circuit and is not disabled by OE or DIR.
CEAB
H
X
L
L
X
FUNCTION TABLE(1)
INPUTS
CLKAB
OEAB
A
X
L
X
L
L
X
L
L
L
H
X
H
X
OUTPUT
B
B0 (2)
B0 (2)
L
H
Z
(1) A-to-B data flow is shown; B-to-A data flow is similar, but uses
CEBA, CLKBA, and OEBA.
(2) Level of B before the indicated steady-state input conditions were
established
2



Part Number SN74LVCH16952A
Description 16-BIT REGISTERED TRANSCEIVER
Maker etcTI
Total Page 3 Pages
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