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SN75LBC175A Datasheet Preview

SN75LBC175A Datasheet

Line Receivers

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SN65LBC175A, SN75LBC175A
QUADRUPLE RSĆ485 DIFFERENTIAL LINE RECEIVERS
SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009
D Designed for TIA/EIA-485, TIA/EIA-422, and
ISO 8482 Applications
D Signaling Rate1 Exceeding 50 Mbps
D Fail-Safe in Bus Short-Circuit, Open-Circuit,
and Idle-Bus Conditions
D ESD Protection on Bus Inputs 6 kV
D Common-Mode Bus Input Range
−7 V to 12 V
D Propagation Delay Times <16 ns
D Low Standby Power Consumption <20 µA
D Pin-Compatible Upgrade for MC3486,
DS96F175, LTC489, and SN75175
SN65LBC175A (Marked as 65LBC175A)
SN75LBC175A (Marked as 75LBC175A)
D or N PACKAGE
(TOP VIEW)
1B 1
1A 2
1Y 3
1,2EN 4
2Y 5
2A 6
2B 7
GND 8
16 VCC
15 4B
14 4A
13 4Y
12 3,4EN
11 3Y
10 3A
9 3B
logic diagram
description
1,2EN
The SN65LBC175A and SN75LBC175A are
quadruple differential line receivers with 3-state
1A
1Y
outputs, designed for TIA/EIA-485 (RS-485),
1B
TIA/EIA-422 (RS-422), and ISO 8482 (Euro
RS-485) applications.
2A
These devices are optimized for balanced
2B
2Y
multipoint bus communication at data rates up to
and exceeding 50 million bits per second. The
3,4EN
transmission media may be twisted-pair cables,
3A
printed-circuit board traces, or backplanes. The
3Y
ultimate rate and distance of data transfer is
3B
dependent upon the attenuation characteristics of
the media and the noise coupling to the
4A
environment.
4Y
4B
Each receiver operates over a wide range of positive and negative common-mode input voltages, and features
ESD protection to 6 kV, making it suitable for high-speed multipoint data transmission applications in harsh
environments. These devices are designed using LinBiCMOSt, facilitating low power consumption and
inherent robustness.
Two EN inputs provide pair-wise enable control, or these can be tied together externally to enable all four drivers
with the same signal.
The SN75LBC175A is characterized for operation over the temperature range of 0°C to 70°C. The
SN65LBC175A is characterized over the temperature range from −40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinBiCMOS is a trademark of Texas Instruments.
1The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2009, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




etcTI

SN75LBC175A Datasheet Preview

SN75LBC175A Datasheet

Line Receivers

No Preview Available !

SN65LBC175A, SN75LBC175A
QUADRUPLE RSĆ485 DIFFERENTIAL LINE RECEIVERS
SLLS455C − NOVEMBER 2000 − REVISED MARCH 2009
FUNCTION TABLE
(each receiver)
DIFFERENTIAL INPUTS
A – B (VID)
VID −0.2 V
−0.2 V < VID < −0.01 V
−0.01 V VID
X
X
ENABLE
EN
H
H
H
L
OPEN
OUTPUT
Y
L
?
H
Z
Z
Short circuit
Open circuit
H = high level, L = low level,
? = indeterminate
H
H
H
H
X = irrelevant, Z = high impedance (off),
AVAILABLE OPTIONS
PACKAGE
TA
PLASTIC
SMALL OUTLINE†
PLASTIC
DUAL-IN-LINE
(JEDEC MS-012)
(JEDEC MS-001)
0°C to 70°C
SN75LBC175AD
SN75LBC175AN
−40°C to 85°C
SN65LBC175AD
SN65LBC175AN
Add an R suffix for taped and reeled
For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see the
TI web site at www.ti.com.
equivalent input and output schematic diagrams
Input
A Input
16 V
100 k
18 k
4 k
16 V
4 k
VCC
Input
B Input
16 V
4
18 k
16 V
100 k
4 k
VCC
Enable Input
VCC
Input
1 k
8V
100 k
VCC
Y Output
5
Output
8V 8V
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number SN75LBC175A
Description Line Receivers
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