SNJ54HC590AJ
Key Features
- direct clear (CCLR) and count-enable (CCKEN) inputs
- A ripple-carry output (RCO) is provided for cascading
- Expansion is acplished easily for two stages by connecting RCO of the first stage to CCKEN of the second stage
- Cascading for larger count chains can be acplished by connecting RCO of each stage to the counter clock (CCLK) input of the following stage
- CCLK and the register clock (RCLK) inputs are positive-edge triggered
- If both clocks are connected together, the counter state always is one count ahead of the register
- Internal circuitry prevents clocking from the clock enable