TLV2354Y Datasheet | Texas Instruments

description symbol (each parator) The TLV2354 consists of four independent, low-power parators specifically designed for IN + single power-supply applications and operate S OUT with power-supply rails as low as 2 V. When - powered from a 3-V supply, the typical supply current is only 240 µA. The TLV2354 is designed using the Texas Instruments Lin CMOS™ technology and, therefore, features an extremely high input impedance (typically greater than 1012 Ω), which allows direct interfacing with high-impedance sources. The outputs are N-channel open-drain configurations that require an external pullup resistor to provide a positive output voltage swing, and they can be connected to achieve positive-logic wired-AND relationships. The TLV2354I is fully characterized for operation from - 40°C to 85°C. The TLV2354M is fully characterized for operation from - 55°C to 125°C. The TLV2354 has internal electrostatic-discharge (ESD)-protection circuits and has been classified with a 1000-V ESD rating using human body model testing. However, care should be exercised in handling this device as exposure to ESD may result in degradation of the device parametric performance. AVAILABLE OPTIONS PACKAGED DEVICES VIOmax at 25°C SMALL OUTLINE (D)† CHIP CARRIER (FK) CERAMIC DIP (J) PLASTIC DIP (N) TSSOP (PW)‡ - 40°C to 85°C 5 m V TLV2354ID - - TLV2354IN TLV2354IPW - 55°C to 125°C 5 m V - TLV2354MFK TLV2354MJ - - † The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLV2352IDR). ‡ The PW packages are only available left-ended taped and reeled (e.g., TLV2354IPW). CERAMIC FLATPACK (W) CHIP FORM (Y) - TLV2354MW These devices have limited built-in protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Please be aware that an important notice concerning availability, standard warranty, and use in...