* Mono 16-Bit Oversampling Sigma-Delta A/D Converter
* Mono 16-Bit Oversampling Sigma-Delta D/A Converter
* Support Maximum Master Clock of 100 MHz to Allow the DSP Output Clock to be Used as a Master Clock
* Selectable FIR/IIR Filter With Bypassing Option
* P
TLV320AIC14K Datasheet (2.51 MB)
TLV320AIC14K
2.51 MB
26-ksps mono codec.
www.ti.com TLV320AIC12, TLV320AIC13 TLV320AIC14, TLV320AIC15 TLV320AIC12K, TLV320AIC14K SLWS115E OCTOBER 2001 REVISED JANUARY 200.
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