TLV320AIC24
FEATURES
- Stereo 16-Bit Oversampling Sigma-Delta A/D Converter
- Stereo 16-Bit Oversampling Sigma-Delta D/A Converter
- Support Maximum Master Clock of 100 MHz to Allow DSPs Output Clock to be Used as a Master Clock
- Selectable FIR/IIR Filter With Bypassing Option
- Programmable Sampling Rate up to:
- Max 26 Ksps With On-Chip IIR/FIR Filter
- Max 104 Ksps With IIR/FIR Bypassed
- On-Chip FIR Produced 84-d B SNR for ADC and 92-d B SNR for DAC over 13-Khz BW
- Smart Time Division Multiplexed (SMARTDM®) Serial Port
- Glueless 4-Wire Interface to DSP
- Automatic Cascade Detection (ACD) Self-Generates Master/Slave Device Addresses
- Programming Mode to Allow On-The-Fly Reconfiguration
- Continuous Data Transfer Mode to Minimize Bit Clock Speed
- Support Different Sampling Rate for Each Device
- Turbo Mode to Maximize Bit Clock For Faster Data Transfer and Allow Multiple Serial Devices to Share the Same Bus
- Allows up to Eight Devices to be Connected to a Single Serial Port
- Host port
-...
