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TLV5614-EP Datasheet Preview

TLV5614-EP Datasheet

12-Bit 3-us Quadruple Digital-to-Analog Converter

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TLV5614ĆEP
2.7ĆV TO 5.5ĆV 12ĆBIT 3Ƶs QUADRUPLE DIGITALĆTOĆANALOG CONVERTER
WITH POWER DOWN
SGLS355 − JUNE 2006
D Controlled Baseline
− One Assembly
− One Test Site
− One Fabrication Site
D Extended Temperature Performance of
−55°C to 125°C
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification
D Qualification Pedigree
D Four 12-Bit Digital-to-Analog Converters
(DACs)
D Programmable Settling Time of Either 3 µs
or 9 µs (Typ)
D TMS320E DSP Family, (Q)SPI, and
MicrowireCompatible Serial Interface
D Internal Power-On Reset
D Low Power Consumption:
8 mW, Slow Mode − 5-V Supply
3.6 mW, Slow Mode − 3-V Supply
D Reference Input Buffer
D Voltage Output Range . . . 2× the Reference
Input Voltage
D Monotonic Overtemperature
D Dual 2.7-V to 5.5-V Supply (Separate Digital
and Analog Supplies)
D Hardware Power Down (10 nA)
D Software Power Down (10 nA)
D Simultaneous Update
applications
D Battery-Powered Test Instruments
D Digital Offset and Gain Adjustment
D Industrial Process Controls
D Machine and Motion Control Devices
D Communications
D Arbitrary Waveform Generation
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
PW PACKAGE
(TOP VIEW)
description
The TLV5614 is a quadruple 12-bit voltage output
digital-to-analog converter (DAC) with a flexible
four-wire serial interface. The four-wire serial
interface allows glueless interface to TMS320
DSP family, SPI, QSPI, and Microwireserial
ports. The TLV5614 is programmed with a 16-bit
serial word comprised of a DAC address,
DVDD 1
PD 2
LDAC 3
DIN 4
SCLK 5
CS 6
FS 7
DGND 8
16 AVDD
15 REFINAB
14 OUTA
13 OUTB
12 OUTC
11 OUTD
10 REFINCD
9 AGND
individual DAC control bits, and a 12-bit DAC
value. The device has provision for two supplies
– one digital supply for the serial interface (via pins
DVDD and DGND), and one for the DACs,
reference buffers, and output buffers (via pins AVDD and AGND). Each supply is independent of the other and
can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC is
controlled via a microprocessor operating on a 3-V supply (also used on pins DVDD and DGND), with the DACs
operating on a 5-V supply. The digital and analog supplies can be tied together.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320 is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2006, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1




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TLV5614-EP Datasheet Preview

TLV5614-EP Datasheet

12-Bit 3-us Quadruple Digital-to-Analog Converter

No Preview Available !

TLV5614ĆEP
2.7ĆV TO 5.5ĆV 12ĆBIT 3Ƶs QUADRUPLE DIGITALĆTOĆANALOG CONVERTER
WITH POWER DOWN
SGLS355 − JUNE 2006
description (continued)
The resistor string output voltage is buffered by a 2× gain rail-to-rail output buffer. The buffer features a Class AB
output stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode
makes it ideal for single-voltage, battery-based applications. The settling time of the DAC is programmable to
allow the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits
within the 16-bit serial input string. A high-impedance buffer is integrated on the REFINAB and REFINCD
terminals to reduce the need for a low source-impedance drive to the terminal. REFINAB and REFINCD allow
DAC A and B to have a different reference voltage than DAC C and D.
The TLV5614 is implemented with a CMOS process and is available in a 16-terminal TSSOP package. The
TLV5614M is characterized for operation from −55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
TA
TSSOP (PW)
−55°C to 125°C
TLV5614MPWREP
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number TLV5614-EP
Description 12-Bit 3-us Quadruple Digital-to-Analog Converter
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