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TM8TU72JPW SYNCHRONOUS DYNAMIC RAM MODULE
D Organization:
− TM8TU72JPW . . . 8 388 608 × 72 Bits
D Designed for 100-MHz, 72-Bit 4-Clock
Systems
D JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) With Register for Use With Socket
D TM8TU72JPW — Uses Nine 64M-Bit
(8M × 8-Bit) SDRAMs in Plastic Thin Small-Outline Package (TSOP), Two SN74ALVC162836 20-Bit Universal Bus Drivers in Thin Shrink Small-Outline Package (TSSOP), and One CDC2510 Phase-Lock Loop (PLL) in TSSOP
D Single 3.
TM8TU72JPW Datasheet
