TMS320C40 Description
D Separate Internal Program, Data, and DMA Coprocessor Buses for Support of Massive Concurrent Input / Output (I/O) of Program and Data Throughput, Maximizing Sustained Central Processing Unit (CPU) Performance D On-Chip Program Cache and Dual-Access/Single-Cycle RAM for Increased Memory-Access Performance 512-Byte Instruction Cache 8K Bytes of Single-Cycle Dual-Access Program or Data RAM ROM-Based Boot Loader...