TMS320DM643
Key Features
- VCXO Interpolated Control Port (VIC) – Supports Audio/Video Synchronization
- Host-Port Interface (HPI) [32-/16-Bit]
- Inter-Integrated Circuit ( I2C Bus™) – Normalization, Saturation, Bit-Counting
- Multichannel Buffered Serial Port – VelociTI.2™ Increased Orthogonality – CLKS Input Not Supported
- L1/L2 Memory Architecture
- Three 32-Bit General-Purpose Timers – 128K-Bit (16K-Byte) L1P Program Cache
- Sixteen General-Purpose I/O (GPIO) Pins (Direct Mapped)
- Flexible PLL Clock Generator – 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative)
- IEEE-1149.1 (JTAG) BoundaryScan-compatible – 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation)
- Endianess: Little Endian, Big Endian
