TMS320F2810-Q1 Overview
.ti. TMS320F2810, TMS320F2810-Q1, TMS320F2811, TMS320F2811-Q1 TMS320F2810, TMS320F2810-Q1, TTMMSS332200FF22881121,, TTMMSS332200FF22881112--QQ11 SPRS174V TAMPSR3IL2200F0128 1R2E,VTISMEDS3FE2B0RFU2A8R1Y22-Q0211 SPRS174V APRIL 2001 REVISED FEBRUARY 2021.
TMS320F2810-Q1 Key Features
- High-performance static CMOS technology
- 150 MHz (6.67-ns cycle time)
- Low-power (1.8-V core at 135 MHz, 1.9-V core at 150 MHz, 3.3-V I/O) design
- JTAG boundary scan support
- IEEE Standard 1149.1-1990 IEEE Standard Test Access Port and Boundary-Scan Architecture
- High-performance 32-bit CPU (TMS320C28x)
- 16 × 16 and 32 × 32 MAC operations
- 16 × 16 dual MAC
- Harvard bus architecture
- Atomic operations