TMS320F28379D-Q1 Key Features
- Dual-core architecture
- Two TMS320C28x 32-bit CPUs
- 200MHz
- IEEE 754 single-precision Floating-Point Unit
- Trigonometric Math Unit (TMU)
- Viterbi/plex Math Unit (VCU-II)
- Two programmable Control Law Accelerators (CLAs)
- 200MHz
- IEEE 754 single-precision floating-point
- Executes code independently of main CPU