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TMS427409A Datasheet Preview

TMS427409A Datasheet

DYNAMIC RANDOM-ACCESS MEMORIES

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TMS416409A, TMS417409A, TMS426409A, TMS427409A
4194304 BY 4-BIT EXTENDED DATA OUT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS893B – AUGUST 1996 – REVISED APRIL 1997
This data sheet is applicable to all
TMS41x409As and TMS42x409As symbolized
by Revision “B”, Revision “E”, and subsequent
revisions as described in the device
symbolization section.
D Organization . . . 4 194304 × 4
D Single Power Supply (5 V or 3.3 V)
D Performance Ranges:
’41x409A-50
’41x409A-60
ACCESS ACCESS ACCESS
TIME TIME TIME
tRAC
MAX
tCAC
MAX
tAA
MAX
50 ns 13 ns 25 ns
60 ns 15 ns 30 ns
EDO
CYCLE
tHPC
MIN
20 ns
25 ns
’41x409A-70
’42x409A-50
70 ns
50 ns
18 ns
13 ns
35 ns
25 ns
30 ns
20 ns
’42x409A-60
60 ns 15 ns 30 ns
25 ns
’42x409A-70
70 ns 18 ns 35 ns
30 ns
D Extended-Data-Out (EDO) Operation
D CAS-Before-RAS ( CBR) Refresh
D Low Power Dissipation
D 3-State Unlatched Output
D High-Reliability Plastic 24 / 26-Lead
300-Mil-Wide Surface-Mount Small-Outline
J-Lead (SOJ) Package (DJ Suffix) and
24/26-Lead 300-Mil-Wide Surface-Mount
Thin Small-Outline Package (TSOP)
(DGA Suffix)
D Operating Free-Air Temperature Range
0°C to 70°C
description
The TMS41x409A and TMS42x409A series are
16 777 216-bit dynamic random-access memory
(DRAM) devices organized as 4 194 304 words of
four bits each.
These devices feature maximum RAS access
times of 50, 60, and 70 ns. All address and data-in
lines are latched on chip to simplify system
design. Data out is unlatched to allow greater
system flexibility.
DJ/DGA PACKAGES
( TOP VIEW )
VCC
DQ1
DQ2
W
RAS
A11
1
2
3
4
5
6
26 VSS
25 DQ4
24 DQ3
23 CAS
22 OE
21 A9
A10
A0
A1
A2
A3
VCC
8
9
10
11
12
13
19 A8
18 A7
17 A6
16 A5
15 A4
14 VSS
PIN NOMENCLATURE
A0 – A11†
DQ1 – DQ4
CAS
NC
OE
RAS
VCC
VSS
W
Address Inputs
Data In / Data Out
Column-Address Strobe
No Internal Connection
Output Enable
Row-Address Strobe
5-V or 3.3-V Supply‡
Ground
Write Enable
A11 is NC for TMS417409A and TMS427409A.
See Available Options Table
DEVICE
TMS416409A
TMS417409A
TMS426409A
TMS427409A
AVAILABLE OPTIONS
POWER
SUPPLY
SELF
REFRESH,
BATTERY
BACKUP
5V –
5V –
3.3 V
3.3 V
REFRESH
CYCLES
4 096 in 64 ms
2 048 in 32 ms
4 096 in 64 ms
2 048 in 32 ms
The TMS416409A and TMS417409A are offered in a 24 / 26-lead plastic surface-mount SOJ package
(DJ suffix). The TMS426409A and TMS427409A are offered in a 24/26-lead plastic surface-mount SOJ
package (DJ suffix) and a 24 / 26-lead plastic surface-mount TSOP (DGA suffix). These packages are designed
for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1997, Texas Instruments Incorporated
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443
1




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TMS427409A Datasheet Preview

TMS427409A Datasheet

DYNAMIC RANDOM-ACCESS MEMORIES

No Preview Available !

TMS416409A, TMS417409A, TMS426409A, TMS427409A
4194304 BY 4-BIT EXTENDED DATA OUT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS893B – AUGUST 1996 – REVISED APRIL 1997
logic symbol (TMS416409A and TMS426409A)
A0 9
A1 10
A2 11
A3 12
A4 15
A5 16
A6 17
A7 18
A8 19
A9 21
A10 8
A11 6
5
RAS
23
CAS
4
W
22
OE
RAM 4096 K × 4
20D10/21D0
A
0
4 194 303
20D19/21D9
20D20
20D21
C20 [ROW]
G23/[REFRESH ROW]
24 [PWR DWN]
C21[COLUMN]
G24
&
23C22
23,21D
G25
24,25 EN
2
DQ1
DQ2
DQ3
DQ4
3
24
25
A,22D
26
A,Z26
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 647-12.
2 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443


Part Number TMS427409A
Description DYNAMIC RANDOM-ACCESS MEMORIES
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Total Page 30 Pages
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