TMS570LS1114
Description
The TMS570LS1114 device is a high-performance automotive-grade microcontroller family for safety systems. The safety architecture includes dual CPUs in lockstep, CPU and memory BIST logic, ECC on both the flash and the data SRAM, parity on peripheral memories, and loopback capability on peripheral I/Os.
Key Features
- High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications - Dual CPUs Running in Lockstep - ECC on Flash and RAM Interfaces - Built-In Self-Test (BIST) for CPU and On-chip RAMs - Error Signaling Module With Error Pin - Voltage and Clock Monitoring
- ARM® Cortex®-R4F 32-Bit RISC CPU - 1.66 DMIPS/MHz With 8-Stage Pipeline - FPU With Single- and Double-Precision - 12-Region Memory Protection Unit (MPU) - Open Architecture With Third-Party Support
- Operating Conditions - Up to 180-MHz System Clock - Core Supply Voltage (VCC): 1.14 to 1.32 V - I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
- Integrated Memory - 1MB of Program Flash With ECC - 128KB of RAM With ECC - 64KB of Flash for Emulated EEPROM With ECC
- 16-Bit External Memory Interface (EMIF)
- Common Platform Architecture - Consistent Memory Map Across Family - Real-Time Interrupt (RTI) Timer (OS Timer) - 128-Channel Vectored Interrupt Module (VIM) - 2-Channel Cyclic Redundancy Checker (CRC)
- Direct Memory Access (DMA) Controller - 16 Channels and 32 Control Packets - Parity Protection for Control Packet RAM - DMA Accesses Protected by Dedicated MPU
- Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
- Separate Nonmodulating PLL
- IEEE 1149.1 JTAG, Boundary Scan and ARM CoreSight™ Components
